1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#include <memlayout.h> 4 5#include <arch/header.ld> 6 7SECTIONS 8{ 9 DRAM_START(0x0) 10 11 BOOTBLOCK(0, 32K) 12 13 ROMSTAGE(0x1f00000, 1M) 14 15#if !ENV_RAMSTAGE 16 STACK(0x2000000, 32K) 17#endif 18 19 FMAP_CACHE(0x2108000, 4K) 20 CBFS_MCACHE(0x2109000, 8K) 21 TIMESTAMP(0x210b000, 4K) 22 CBFS_CACHE(0x210c000, 512K) 23 PRERAM_CBMEM_CONSOLE(0x218c000, 128K) 24 25 /* By default all memory addresses are affected by the value of HRMOR 26 * (Hypervisor Real Mode Offset Register) which is ORed to them. HRMOR 27 * has initial value of 0x8000000 in QEMU and is changed to 0 in 28 * ramstage. This means that before ramstage 0 actually points to 29 * 0x8000000. */ 30#if ENV_RAMSTAGE 31 STACK(0xa000000, 32K) 32#endif 33 RAMSTAGE(0xa008000, 2M) 34} 35