1FLASH 32M { 2 SI_ALL 8M { 3 SI_DESC 16K 4 SI_ME 5 } 6 SI_BIOS 24M { 7 RW_SECTION_A 7680K { 8 VBLOCK_A 8K 9 FW_MAIN_A(CBFS) 10 RW_FWID_A 64 11 } 12 RW_MISC 1M { 13 UNIFIED_MRC_CACHE(PRESERVE) 128K { 14 RECOVERY_MRC_CACHE 64K 15 RW_MRC_CACHE 64K 16 } 17 RW_ELOG(PRESERVE) 16K 18 RW_SHARED 16K { 19 SHARED_DATA 8K 20 VBLOCK_DEV 8K 21 } 22 RW_VPD(PRESERVE) 8K 23 RW_NVRAM(PRESERVE) 24K 24 } 25 # This section starts at the 16M boundary in SPI flash. 26 # MTL does not support a region crossing this boundary, 27 # because the SPI flash is memory-mapped into two non- 28 # contiguous windows. 29 RW_SECTION_B 7680K { 30 VBLOCK_B 8K 31 FW_MAIN_B(CBFS) 32 RW_FWID_B 64 33 } 34 RW_LEGACY(CBFS) 1M 35 RW_UNUSED 3M 36 # Make WP_RO region align with SPI vendor 37 # memory protected range specification. 38 WP_RO 4M { 39 RO_VPD(PRESERVE) 16K 40 RO_GSCVD 8K 41 RO_SECTION { 42 FMAP 2K 43 RO_FRID 64 44 GBB@4K 12K 45 COREBOOT(CBFS) 46 } 47 } 48 } 49} 50