1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 #include <amdblocks/acpi.h>
4 #include <amdblocks/acpimmio.h>
5 #include <amdblocks/amd_pci_util.h>
6 #include <amdblocks/xhci.h>
7 #include <baseboard/variants.h>
8 #include <cpu/x86/smm.h>
9 #include <device/device.h>
10 #include <drivers/i2c/tpm/chip.h>
11 #include <variant/ec.h>
12
13 /* The IRQ mapping in fch_irq_map ends up getting written to the indirect address space that is
14 accessed via I/O ports 0xc00/0xc01. */
15
16 /*
17 * This controls the device -> IRQ routing.
18 *
19 * Hardcoded IRQs:
20 * 0: timer < soc/amd/common/acpi/lpc.asl
21 * 1: i8042 - Keyboard
22 * 2: cascade
23 * 8: rtc0 <- soc/amd/common/acpi/lpc.asl
24 * 9: acpi <- soc/amd/common/acpi/lpc.asl
25 */
26
27 static const struct fch_irq_routing fch_irq_map[] = {
28 { PIRQ_A, 12, PIRQ_NC },
29 { PIRQ_B, 14, PIRQ_NC },
30 { PIRQ_C, 15, PIRQ_NC },
31 { PIRQ_D, 12, PIRQ_NC },
32 { PIRQ_E, 14, PIRQ_NC },
33 { PIRQ_F, 15, PIRQ_NC },
34 { PIRQ_G, 12, PIRQ_NC },
35 { PIRQ_H, 14, PIRQ_NC },
36
37 { PIRQ_SCI, ACPI_SCI_IRQ, ACPI_SCI_IRQ },
38 { PIRQ_SDIO, PIRQ_NC, PIRQ_NC },
39 { PIRQ_GPIO, 11, 11 },
40 { PIRQ_I2C0, 10, 10 },
41 { PIRQ_I2C1, 7, 7 },
42 { PIRQ_I2C2, 6, 6 },
43 { PIRQ_I2C3, 5, 5 },
44 { PIRQ_UART0, 4, 4 },
45 { PIRQ_UART1, 3, 3 },
46
47 /* The MISC registers are not interrupt numbers */
48 { PIRQ_MISC, 0xfa, 0x00 },
49 { PIRQ_MISC0, 0x91, 0x00 },
50 { PIRQ_HPET_L, 0x00, 0x00 },
51 { PIRQ_HPET_H, 0x00, 0x00 },
52 };
53
mb_get_fch_irq_mapping(size_t * length)54 const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length)
55 {
56 *length = ARRAY_SIZE(fch_irq_map);
57 return fch_irq_map;
58 }
59
mainboard_configure_gpios(void)60 static void mainboard_configure_gpios(void)
61 {
62 size_t base_num_gpios, override_num_gpios;
63 const struct soc_amd_gpio *base_gpios, *override_gpios;
64
65 baseboard_gpio_table(&base_gpios, &base_num_gpios);
66 variant_override_gpio_table(&override_gpios, &override_num_gpios);
67
68 gpio_configure_pads_with_override(base_gpios, base_num_gpios,
69 override_gpios, override_num_gpios);
70 }
71
mainboard_init(void * chip_info)72 static void mainboard_init(void *chip_info)
73 {
74 mainboard_configure_gpios();
75 mainboard_ec_init();
76 }
77
mainboard_enable(struct device * dev)78 static void mainboard_enable(struct device *dev)
79 {
80 /* TODO: b/184678786 - Move into espi_config */
81 /* Unmask eSPI IRQ 1 (Keyboard) */
82 pm_write32(PM_ESPI_INTR_CTRL, PM_ESPI_DEV_INTR_MASK & ~(BIT(1)));
83 }
84
smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info * slots,size_t size)85 void smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, size_t size)
86 {
87 soc_xhci_store_resources(slots, size);
88 }
89
90 struct chip_operations mainboard_ops = {
91 .init = mainboard_init,
92 .enable_dev = mainboard_enable,
93 };
94