1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <bootmode.h>
4 #include <boot/coreboot_tables.h>
5 #include <device/pci_ops.h>
6 #include <device/device.h>
7
8 #include <southbridge/intel/bd82x6x/pch.h>
9 #include <southbridge/intel/common/gpio.h>
10 #include <types.h>
11 #include <vendorcode/google/chromeos/chromeos.h>
12
13 #include "onboard.h"
14
fill_lb_gpios(struct lb_gpios * gpios)15 void fill_lb_gpios(struct lb_gpios *gpios)
16 {
17 const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);
18 u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1);
19
20 struct lb_gpio chromeos_gpios[] = {
21 /* Lid switch GPIO active high (open). */
22 {GPIO_LID, ACTIVE_HIGH, get_lid_switch(), "lid"},
23
24 /* Power Button */
25 {101, ACTIVE_LOW, (gen_pmcon_1 >> 9) & 1, "power"},
26
27 /* Did we load the VGA Option ROM? */
28 /* -1 indicates that this is a pseudo GPIO */
29 {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
30 };
31 lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
32 }
33
get_lid_switch(void)34 int get_lid_switch(void)
35 {
36 return get_gpio(GPIO_LID);
37 }
38
get_write_protect_state(void)39 int get_write_protect_state(void)
40 {
41 return !get_gpio(GPIO_SPI_WP);
42 }
43
get_recovery_mode_switch(void)44 int get_recovery_mode_switch(void)
45 {
46 return !get_gpio(GPIO_REC_MODE);
47 }
48
49 static const struct cros_gpio cros_gpios[] = {
50 CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
51 CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
52 };
53 DECLARE_CROS_GPIOS(cros_gpios);
54
get_ec_is_trusted(void)55 int get_ec_is_trusted(void)
56 {
57 /* Do not have a Chrome EC involved in entering recovery mode;
58 Always return trusted. */
59 return 1;
60 }
61