1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2 3#include <acpi/acpi.h> 4#include <variant/ec.h> 5 6DefinitionBlock( 7 "dsdt.aml", 8 "DSDT", 9 ACPI_DSDT_REV_2, 10 OEM_ID, 11 ACPI_TABLE_CREATOR, 12 0x20110725 13) 14{ 15 #include <acpi/dsdt_top.asl> 16 #include <soc/intel/common/acpi/platform.asl> 17 #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> 18 #include <cpu/intel/common/acpi/cpu.asl> 19 20 Scope (\_SB) { 21 Device (PCI0) 22 { 23 #include <soc/intel/common/block/acpi/acpi/northbridge.asl> 24 #include <soc/intel/meteorlake/acpi/southbridge.asl> 25 #include <soc/intel/meteorlake/acpi/tcss.asl> 26 } 27 } 28 29 /* Chipset specific sleep states */ 30 #include <southbridge/intel/common/acpi/sleepstates.asl> 31 32 /* Chrome OS Embedded Controller */ 33 Scope (\_SB.PCI0.LPCB) 34 { 35 /* ACPI code for EC SuperIO functions */ 36 #include <ec/google/chromeec/acpi/superio.asl> 37 /* ACPI code for EC functions */ 38 #include <ec/google/chromeec/acpi/ec.asl> 39 } 40 /* Mainboard specific */ 41#if CONFIG(BOARD_GOOGLE_MODEL_REX) 42 Scope (\_SB.PCI0.SPI0) 43 { 44 #include <variant/acpi/hid_spi_elan.asl> 45 } 46#endif 47} 48