1FLASH@0xfe000000 0x2000000 { 2 SI_ALL@0x0 0x400000 { 3 SI_DESC@0x0 0x1000 4 SI_EC@0x1000 0x100000 5 SI_GBE(PRESERVE)@0x101000 0x2000 6 SI_ME@0x103000 0x2f9000 7 SI_PDR(PRESERVE)@0x3fc000 0x4000 8 } 9 SI_BIOS@0x400000 0x1c00000 { 10 RW_DIAG@0x0 0x12d0000 { 11 RW_LEGACY(CBFS)@0x0 0x12c0000 12 DIAG_NVRAM@0x12c0000 0x10000 13 } 14 RW_SECTION_A@0x12d0000 0x280000 { 15 VBLOCK_A@0x0 0x10000 16 FW_MAIN_A(CBFS)@0x10000 0x26ffc0 17 RW_FWID_A@0x27ffc0 0x40 18 } 19 RW_SECTION_B@0x1550000 0x280000 { 20 VBLOCK_B@0x0 0x10000 21 FW_MAIN_B(CBFS)@0x10000 0x26ffc0 22 RW_FWID_B@0x27ffc0 0x40 23 } 24 RW_MISC@0x17d0000 0x30000 { 25 UNIFIED_MRC_CACHE@0x0 0x20000 { 26 RECOVERY_MRC_CACHE@0x0 0x10000 27 RW_MRC_CACHE@0x10000 0x10000 28 } 29 RW_ELOG(PRESERVE)@0x20000 0x4000 30 RW_SHARED@0x24000 0x4000 { 31 SHARED_DATA@0x0 0x2000 32 VBLOCK_DEV@0x2000 0x2000 33 } 34 RW_VPD(PRESERVE)@0x28000 0x2000 35 RW_NVRAM(PRESERVE)@0x2a000 0x6000 36 } 37 WP_RO@0x1800000 0x400000 { 38 RO_VPD(PRESERVE)@0x0 0x4000 39 RO_UNUSED@0x4000 0xc000 40 RO_SECTION@0x10000 0x3f0000 { 41 FMAP@0x0 0x800 42 RO_FRID@0x800 0x40 43 RO_FRID_PAD@0x840 0x7c0 44 GBB@0x1000 0x3000 45 COREBOOT(CBFS)@0x4000 0x3ec000 46 } 47 } 48 } 49} 50