1## SPDX-License-Identifier: GPL-2.0-only 2 3config BOARD_GOOGLE_VEYRON 4 def_bool BOARD_GOOGLE_VEYRON_JAQ || \ 5 BOARD_GOOGLE_VEYRON_JERRY || \ 6 BOARD_GOOGLE_VEYRON_MIGHTY || \ 7 BOARD_GOOGLE_VEYRON_MINNIE || \ 8 BOARD_GOOGLE_VEYRON_SPEEDY 9 10if BOARD_GOOGLE_VEYRON 11 12# Some Veyron boards incorrectly had their RAM code strapped with 100Kohm 13# resistors. These get overpowered by the SoC's internal pull-downs, so we 14# cannot read those pins as tri-state. They're restricted to binary RAM codes. 15config VEYRON_FORCE_BINARY_RAM_CODE 16 def_bool BOARD_GOOGLE_VEYRON_JAQ || \ 17 BOARD_GOOGLE_VEYRON_JERRY || \ 18 BOARD_GOOGLE_VEYRON_MIGHTY 19 20config BOARD_SPECIFIC_OPTIONS 21 def_bool y 22 select COMMON_CBFS_SPI_WRAPPER 23 select EC_GOOGLE_CHROMEEC 24 select EC_GOOGLE_CHROMEEC_SPI 25 select SOC_ROCKCHIP_RK3288 26 select MAINBOARD_HAS_CHROMEOS 27 select BOARD_ROMSIZE_KB_4096 28 select SPI_FLASH 29 select SPI_FLASH_GIGADEVICE 30 select SPI_FLASH_WINBOND 31 select I2C_TPM 32 select MAINBOARD_HAS_TPM1 33 select SYSTEM_TYPE_LAPTOP 34 35config VBOOT 36 select VBOOT_VBNV_FLASH 37 38config MAINBOARD_DIR 39 default "google/veyron" 40 41config MAINBOARD_PART_NUMBER 42 default "Veyron_Jaq" if BOARD_GOOGLE_VEYRON_JAQ 43 default "Veyron_Jerry" if BOARD_GOOGLE_VEYRON_JERRY 44 default "Veyron_Mighty" if BOARD_GOOGLE_VEYRON_MIGHTY 45 default "Veyron_Minnie" if BOARD_GOOGLE_VEYRON_MINNIE 46 default "Veyron_Speedy" if BOARD_GOOGLE_VEYRON_SPEEDY 47 default "Veyron" 48 49config EC_GOOGLE_CHROMEEC_SPI_BUS 50 hex 51 default 0x0 52 53config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US 54 int 55 default 100 56 57config BOOT_DEVICE_SPI_FLASH_BUS 58 int 59 default 2 60 61config DRIVER_TPM_I2C_BUS 62 hex 63 default 0x1 64 65config DRIVER_TPM_I2C_ADDR 66 hex 67 default 0x20 68 69config CONSOLE_SERIAL_UART_ADDRESS 70 hex 71 depends on DRIVERS_UART 72 default 0xFF690000 73 74config PMIC_BUS 75 int 76 default 0 77 78config CBFS_SIZE 79 default 0x100000 if CHROMEOS 80 default ROM_SIZE 81 82endif # BOARD_GOOGLE_VEYRON 83