1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#define DPTF_TSR0_SENSOR_ID 0 4#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal" 5#define DPTF_TSR0_PASSIVE 49 6#define DPTF_TSR0_CRITICAL 75 7 8#define DPTF_TSR1_SENSOR_ID 1 9#define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" 10#define DPTF_TSR1_PASSIVE 65 11#define DPTF_TSR1_CRITICAL 85 12 13#define DPTF_TSR2_SENSOR_ID 2 14#define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom" 15#define DPTF_TSR2_PASSIVE 49 16#define DPTF_TSR2_CRITICAL 75 17 18#define DPTF_ENABLE_CHARGER 19 20/* Charger performance states, board-specific values from charger and EC */ 21Name (CHPS, Package () { 22 Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */ 23 Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */ 24 Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */ 25 Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */ 26 Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0.0A */ 27}) 28 29/* Mainboard specific _PDL is 1GHz */ 30Name (MPDL, 8) 31 32Name (DTRT, Package () { 33 /* CPU Throttle Effect on CPU */ 34 Package () { \_SB.PCI0.B0DB, \_SB.PCI0.B0DB, 100, 50, 0, 0, 0, 0 }, 35 36 /* CPU Effect on Temp Sensor 0 */ 37 Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR0, 100, 100, 0, 0, 0, 0 }, 38}) 39 40Name (MPPC, Package () 41{ 42 0x2, /* Revision */ 43 Package () { /* Power Limit 1 */ 44 0, /* PowerLimitIndex, 0 for Power Limit 1 */ 45 2000, /* PowerLimitMinimum */ 46 6200, /* PowerLimitMaximum */ 47 1000, /* TimeWindowMinimum */ 48 1000, /* TimeWindowMaximum */ 49 200 /* StepSize */ 50 }, 51 Package () { /* Power Limit 2 */ 52 1, /* PowerLimitIndex, 1 for Power Limit 2 */ 53 8000, /* PowerLimitMinimum */ 54 8000, /* PowerLimitMaximum */ 55 1000, /* TimeWindowMinimum */ 56 1000, /* TimeWindowMaximum */ 57 1000 /* StepSize */ 58 } 59}) 60 61/* Include DPTF */ 62#include <acpi/dptf/dptf.asl> 63