1FLASH@0xff800000 0x800000 { 2 SI_ALL@0x0 0x200000 { 3 SI_DESC@0x0 0x1000 4 SI_ME@0x1000 0x1ff000 5 } 6 SI_BIOS@0x200000 0x600000 { 7 RW_SECTION_A@0x0 0xf0000 { 8 VBLOCK_A@0x0 0x10000 9 FW_MAIN_A(CBFS)@0x10000 0xdffc0 10 RW_FWID_A@0xeffc0 0x40 11 } 12 RW_SECTION_B@0xf0000 0xf0000 { 13 VBLOCK_B@0x0 0x10000 14 FW_MAIN_B(CBFS)@0x10000 0xdffc0 15 RW_FWID_B@0xeffc0 0x40 16 } 17 RW_MRC_CACHE@0x1e0000 0x10000 18 RW_ELOG(PRESERVE)@0x1f0000 0x4000 19 RW_SHARED@0x1f4000 0x4000 { 20 SHARED_DATA@0x0 0x2000 21 VBLOCK_DEV@0x2000 0x2000 22 } 23 RW_VPD(PRESERVE)@0x1f8000 0x2000 24 RW_NVRAM@0x1fa000 0x6000 25 SMMSTORE(PRESERVE)@0x200000 0x40000 26 RW_LEGACY(CBFS)@0x240000 0x1c0000 27 WP_RO@0x400000 0x200000 { 28 RO_VPD(PRESERVE)@0x0 0x4000 29 RO_UNUSED@0x4000 0xc000 30 RO_SECTION@0x10000 0x1f0000 { 31 FMAP@0x0 0x800 32 RO_FRID@0x800 0x40 33 RO_FRID_PAD@0x840 0x7c0 34 GBB@0x1000 0x6f000 35 COREBOOT(CBFS)@0x70000 0x180000 36 } 37 } 38 } 39} 40