1FLASH@0xff800000 0x800000 { 2 SI_ALL@0x0 0x180000 { 3 SI_DESC@0x0 0x1000 4 SI_ME@0x1000 0x17f000 5 } 6 SI_BIOS@0x180000 0x680000 { 7 RW_VPD(PRESERVE)@0x0 0x1000 8 RW_UNUSED@0x1000 0x67000 9 RW_SHARED@0x68000 0x18000 { 10 RW_ENVIRONMENT@0x0 0x4000 11 RW_MRC_CACHE@0x4000 0x10000 12 DEV_CFG@0x14000 0x4000 13 } 14 RW_SECTION_A@0x80000 0x100000 { 15 VBLOCK_A@0x0 0x10000 16 FW_MAIN_A(CBFS)@0x10000 0x7ffc0 17 RW_FWID_A@0x8ffc0 0x40 18 RW_UNUSED_A@0x90000 0x70000 19 } 20 RW_SECTION_B@0x180000 0x100000 { 21 VBLOCK_B@0x0 0x10000 22 FW_MAIN_B(CBFS)@0x10000 0x7ffc0 23 RW_FWID_B@0x8ffc0 0x40 24 RW_UNUSED_B@0x90000 0x70000 25 } 26 RO_UNUSED_1@0x280000 0x170000 27 RO_VPD(PRESERVE)@0x3f0000 0x20000 28 RO_UNUSED_2@0x410000 0xe0000 29 RO_SECTION@0x4f0000 0x190000 { 30 FMAP@0x0 0x800 31 RO_FRID@0x800 0x40 32 RO_PADDING@0x840 0xf7c0 33 GBB@0x10000 0x80000 34 COREBOOT(CBFS)@0x90000 0x100000 35 } 36 } 37} 38