1FLASH@0xff800000 0x800000 { 2 SI_ALL@0x0 0x500000 { 3 SI_DESC@0x0 0x1000 4 SI_GBE@0x1000 0x2000 5 SI_ME@0x3000 0x4ed000 6 } 7 SI_BIOS@0x500000 0x300000 { 8 RW_SECTION_A 0x180000 { 9 VBLOCK_A 0x10000 10 FW_MAIN_A(CBFS) 11 RW_FWID_A 0x40 12 } 13 UNIFIED_MRC_CACHE 0x20000 { 14 RECOVERY_MRC_CACHE 0x10000 15 RW_MRC_CACHE 0x10000 16 } 17 RW_VPD(PRESERVE) 0x1000 18 SMMSTORE(PRESERVE) 0x40000 19 RW_NVRAM(PRESERVE) 0x2000 20 21 WP_RO { 22 RO_VPD(PRESERVE) 0x1000 23 RO_SECTION 0x11e000 { 24 FMAP 0x800 25 RO_FRID 0x40 26 RO_PADDING 0x7c0 27 GBB 0x1e000 28 COREBOOT(CBFS) 29 } 30 } 31 } 32} 33