1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <device/pnp_ops.h>
4 #include <southbridge/intel/lynxpoint/pch.h>
5 #include <superio/nuvoton/common/nuvoton.h>
6 #include <superio/nuvoton/nct6779d/nct6779d.h>
7
8 #define GLOBAL_DEV PNP_DEV(0x4e, 0)
9 #define SERIAL_DEV PNP_DEV(0x4e, NCT6779D_SP1)
10 #define ACPI_DEV PNP_DEV(0x4e, NCT6779D_ACPI)
11
mainboard_config_superio(void)12 void mainboard_config_superio(void)
13 {
14 nuvoton_pnp_enter_conf_state(GLOBAL_DEV);
15
16 /* Select SIO pin mux states */
17 pnp_write_config(GLOBAL_DEV, 0x1a, 0x30);
18 pnp_write_config(GLOBAL_DEV, 0x1b, 0x70);
19 pnp_write_config(GLOBAL_DEV, 0x1c, 0x08);
20 pnp_write_config(GLOBAL_DEV, 0x1d, 0x00);
21 pnp_write_config(GLOBAL_DEV, 0x22, 0xff);
22 pnp_write_config(GLOBAL_DEV, 0x24, 0x04);
23 pnp_write_config(GLOBAL_DEV, 0x2a, 0x08);
24 pnp_write_config(GLOBAL_DEV, 0x2c, 0x00);
25
26 /* Enable keyboard wakeup, 3VSBSW# is not connected */
27 pnp_set_logical_device(ACPI_DEV);
28 pnp_write_config(ACPI_DEV, 0xe4, 0x08);
29
30 nuvoton_pnp_exit_conf_state(GLOBAL_DEV);
31
32 nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
33 }
34