1FLASH@0x0 16M { 2 # must use a power of two in MiB for WP_RO 3 WP_RO@0x0 0x400000 { 4 RO_SECTION@0x0 0x3fc000 { 5 # 0 - 0x10000 is free for firmware usage. 6 # bootblock starts at 0x20000 7 FMAP@0x0 0x1000 8 RO_FRID@0x1000 0x100 9 # bootblock includes trusted/non-trusted CLIB, CSIB, 10 # and BL1FWs packaged in 11 # src/soc/cavium/common/Makefile.mk. 12 BOOTBLOCK@0x10000 0x70000 13 COREBOOT(CBFS)@0x80000 0x2fc000 14 GBB@0x37c000 0x80000 15 } 16 RO_VPD(PRESERVE)@0x3fc000 0x4000 17 } 18 RW_SECTION_A@0x400000 0x5fa000 { 19 VBLOCK_A@0x0 0x2000 20 FW_MAIN_A(CBFS)@0x2000 0x5f7f00 21 RW_FWID_A@0x5f9f00 0x100 22 } 23 RW_SECTION_B@0x9fa000 0x5fa000 { 24 VBLOCK_B@0x0 0x2000 25 FW_MAIN_B(CBFS)@0x2000 0x5f7f00 26 RW_FWID_B@0x5f9f00 0x100 27 } 28 RW_ELOG(PRESERVE)@0xff4000 0x4000 29 RW_VPD(PRESERVE)@0xff8000 0x8000 30} 31