1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <cpu/x86/smm.h>
4 #include <device/pci_ops.h>
5 #include <southbridge/intel/common/pmutil.h>
6 #include <northbridge/intel/ironlake/ironlake.h>
7 #include <ec/acpi/ec.h>
8
mainboard_smi_gpi(u32 gpi_sts)9 void mainboard_smi_gpi(u32 gpi_sts)
10 {
11 }
12
mainboard_smi_apmc(u8 data)13 int mainboard_smi_apmc(u8 data)
14 {
15 u8 tmp;
16 switch (data) {
17 case APM_CNT_ACPI_ENABLE:
18 tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
19 tmp &= ~0x03;
20 tmp |= 0x02;
21 pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
22 break;
23 case APM_CNT_ACPI_DISABLE:
24 tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
25 tmp &= ~0x03;
26 tmp |= 0x01;
27 pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
28 break;
29 default:
30 break;
31 }
32 return 0;
33 }
34