1FLASH@0xff000000 0x1000000 { 2 SI_ALL 6M { 3 SI_DESC 4K 4 SI_ME 5 } 6 7 RW_MISC 424K { 8 UNIFIED_MRC_CACHE(PRESERVE) 128K { 9 RECOVERY_MRC_CACHE 64K 10 RW_MRC_CACHE 64K 11 } 12 SMMSTORE(PRESERVE) 256K 13 RW_SHARED 0x4000 { 14 SHARED_DATA@0x0 0x2000 15 VBLOCK_DEV@0x2000 0x2000 16 } 17 RW_NVRAM(PRESERVE) 24K 18 } 19 20 CONSOLE 0x20000 21 22 RW_SECTION_A { 23 VBLOCK_A 0x2000 24 FW_MAIN_A(CBFS) 25 RW_FWID_A 0x40 26 } 27 28 # T/B = 0 29 # BP3 = 0 BP2 = 1 BP1 = 1 BP0 = 1 30 WP_RO@0xC00000 0x400000 { 31 RO_VPD(PRESERVE)@0x0 0x4000 32 RO_SECTION@0x4000 0x3fc000 { 33 FMAP@0x0 0x800 34 RO_FRID@0x800 0x40 35 RO_FRID_PAD@0x840 0x7c0 36 GBB@0x1000 0x3000 37 COREBOOT(CBFS)@0x4000 0x3f8000 38 } 39 } 40} 41