1FLASH 16M { 2 SI_ALL@0x0 0x500000 { 3 SI_DESC@0x0 0x1000 4 SI_ME@0x1000 0x4ff000 5 } 6 SI_BIOS@0x500000 0xb00000 { 7 RW_SECTION_A@0x0 0x33e000 { 8 VBLOCK_A@0x0 0x20000 9 FW_MAIN_A(CBFS)@0x20000 0x31dfc0 10 RW_FWID_A@0x33dfc0 0x40 11 } 12 RW_SECTION_B@0x33e000 0x33e000 { 13 VBLOCK_B@0x0 0x20000 14 FW_MAIN_B(CBFS)@0x20000 0x31dfc0 15 RW_FWID_B@0x33dfc0 0x40 16 } 17 MISC_RW@0x67d000 0x62000 { 18 UNIFIED_MRC_CACHE@0x0 0x20000 { 19 RECOVERY_MRC_CACHE@0x0 0x10000 20 RW_MRC_CACHE@0x10000 0x10000 21 } 22 RW_VPD(PRESERVE)@0x20000 0x2000 23 SMMSTORE(PRESERVE)@0x22000 0x40000 24 } 25 WP_RO@0x6df000 0x421000 { 26 RO_VPD(PRESERVE)@0x0 0x4000 27 RO_SECTION@0x4000 0x41d000 { 28 FMAP@0x0 0x800 29 RO_FRID@0x800 0x40 30 RO_FRID_PAD@0x840 0x7c0 31 GBB@0x1000 0xef000 32 COREBOOT(CBFS)@0xf0000 0x32d000 33 } 34 } 35 } 36} 37