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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <acpi/acpigen_pci.h>
4 #include <amdblocks/ioapic.h>
5 #include <amdblocks/data_fabric.h>
6 #include <amdblocks/memmap.h>
7 #include <amdblocks/root_complex.h>
8 #include <amdblocks/smn.h>
9 #include <arch/ioapic.h>
10 #include <console/console.h>
11 #include <device/device.h>
12 #include <types.h>
13 
14 #include <vendorcode/amd/opensil/genoa_poc/opensil.h>
15 
16 #define IOHC_IOAPIC_BASE_ADDR_LO 0x2f0
17 
read_soc_memmap_resources(struct device * domain,unsigned long * idx)18 void read_soc_memmap_resources(struct device *domain, unsigned long *idx)
19 {
20 	read_lower_soc_memmap_resources(domain, idx);
21 
22 	add_opensil_memmap(domain, idx);
23 }
24 
genoa_domain_set_resources(struct device * domain)25 static void genoa_domain_set_resources(struct device *domain)
26 {
27 	if (domain->downstream->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
28 		printk(BIOS_DEBUG, "Setting VGA decoding for domain 0x%x\n",
29 		       domain->path.domain.domain);
30 		const union df_vga_en vga_en = {
31 			.ve = 1,
32 			.dst_fabric_id = get_iohc_fabric_id(domain),
33 		};
34 		data_fabric_broadcast_write32(DF_VGA_EN, vga_en.raw);
35 	}
36 
37 	pci_domain_set_resources(domain);
38 
39 	/* Enable IOAPIC memory decoding */
40 	struct resource *res = probe_resource(domain, IOMMU_IOAPIC_IDX);
41 	if (res) {
42 		const uint32_t iohc_misc_base = get_iohc_misc_smn_base(domain);
43 		uint32_t ioapic_base = smn_read32(iohc_misc_base | IOHC_IOAPIC_BASE_ADDR_LO);
44 		ioapic_base |= (1 << 0);
45 		smn_write32(iohc_misc_base | IOHC_IOAPIC_BASE_ADDR_LO, ioapic_base);
46 	}
47 }
48 
genoa_domain_acpi_name(const struct device * domain)49 static const char *genoa_domain_acpi_name(const struct device *domain)
50 {
51 	const char *domain_acpi_names[4] = {
52 		"S0B0",
53 		"S0B1",
54 		"S0B2",
55 		"S0B3",
56 	};
57 
58 	if (domain->path.domain.domain < ARRAY_SIZE(domain_acpi_names))
59 		return domain_acpi_names[domain->path.domain.domain];
60 
61 	return NULL;
62 }
63 
64 struct device_operations genoa_pci_domain_ops = {
65 	.read_resources	= amd_pci_domain_read_resources,
66 	.set_resources	= genoa_domain_set_resources,
67 	.scan_bus	= amd_pci_domain_scan_bus,
68 	.init		= amd_pci_domain_init,
69 	.acpi_name	= genoa_domain_acpi_name,
70 	.acpi_fill_ssdt	= pci_domain_fill_ssdt,
71 };
72