1# SPDX-License-Identifier: BSD-3-Clause 2 3# TODO: Move as much as possible to common 4# TODO: Update for Glinda 5 6ifeq ($(CONFIG_SOC_AMD_GLINDA),y) 7 8subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage 9 10# Beware that all-y also adds the compilation unit to verstage on PSP 11all-y += aoac.c 12all-y += config.c 13all-y += i2c.c 14 15# all_x86-y adds the compilation unit to all stages that run on the x86 cores 16all_x86-y += gpio.c 17all_x86-y += uart.c 18 19bootblock-y += early_fch.c 20bootblock-y += espi_util.c 21 22verstage-y += espi_util.c 23 24romstage-y += fsp_m_params.c 25 26ramstage-y += acpi.c 27ramstage-y += chip.c 28ramstage-y += cpu.c 29ramstage-y += fch.c 30ramstage-y += fsp_s_params.c 31ramstage-y += mca.c 32ramstage-y += memmap.c 33ramstage-y += root_complex.c 34ramstage-y += xhci.c 35 36smm-y += gpio.c 37smm-y += smihandler.c 38smm-$(CONFIG_DEBUG_SMI) += uart.c 39 40CPPFLAGS_common += -I$(src)/soc/amd/glinda/include 41CPPFLAGS_common += -I$(src)/soc/amd/glinda/acpi 42CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/glinda 43CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common 44 45# Building the cbfs image will fail if the offset, aligned to 64 bytes, isn't large enough 46ifeq ($(CONFIG_CBFS_VERIFICATION),y) 47# 0x80 accounts for the cbfs_file struct + filename + metadata structs 48AMD_FW_AB_POSITION := 0x80 49else # ($(CONFIG_CBFS_VERIFICATION), y) 50# 0x40 accounts for the cbfs_file struct + filename + metadata structs without hash attribute 51AMD_FW_AB_POSITION := 0x40 52endif # ($(CONFIG_CBFS_VERIFICATION), y) 53 54GLINDA_FW_A_POSITION=$(call int-add, \ 55 $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION)) 56 57GLINDA_FW_B_POSITION=$(call int-add, \ 58 $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION)) 59# 60# PSP Directory Table items 61# 62# Certain ordering requirements apply, however these are ensured by amdfwtool. 63# For more information see "AMD Platform Security Processor BIOS Architecture 64# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). 65# 66 67ifeq ($(CONFIG_PSP_DISABLE_POSTCODES),y) 68PSP_SOFTFUSE_BITS += 7 69endif 70 71ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y) 72# Enable secure debug unlock 73PSP_SOFTFUSE_BITS += 0 74OPT_TOKEN_UNLOCK="--token-unlock" 75endif 76 77ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y) 78OPT_PSP_LOAD_MP2_FW="--load-mp2-fw" 79else 80# Disable MP2 firmware loading 81PSP_SOFTFUSE_BITS += 29 82endif 83 84# Use additional Soft Fuse bits specified in Kconfig 85PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS)) 86 87# type = 0x3a 88ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) 89PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) 90endif 91 92# type = 0x55 93SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE) 94ifeq ($(CONFIG_HAVE_SPL_RW_AB_FILE),y) 95SPL_RW_AB_TABLE_FILE=$(CONFIG_SPL_RW_AB_TABLE_FILE) 96else 97SPL_RW_AB_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE) 98endif 99 100# 101# BIOS Directory Table items - proper ordering is managed by amdfwtool 102# 103 104# type = 0x60 105PSP_APCB_FILES=$(APCB_SOURCES) $(APCB_SOURCES_RECOVERY) 106 107# type = 0x61 108PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS) 109 110# type = 0x62 111PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img 112PSP_ELF_FILE=$(objcbfs)/bootblock.elf 113PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}') 114PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}') 115 116ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y) 117# type = 0x63 - construct APOB NV base/size from flash map 118# The flashmap section used for this is expected to be named RW_MRC_CACHE 119APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE) 120APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) 121endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE 122 123ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) 124# type = 0x6B - PSP Shared memory location 125ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0) 126PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE) 127PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map) 128endif 129 130# type = 0x52 - PSP Bootloader Userspace Application (verstage) 131PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE)) 132PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN)) 133endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK 134 135ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW),y) 136SIGNED_AMDFW_A_POSITION=$(call int-subtract, \ 137 $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_A_START) \ 138 $(call get_fmap_value,FMAP_SECTION_FLASH_START)) 139SIGNED_AMDFW_B_POSITION=$(call int-subtract, \ 140 $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_B_START) \ 141 $(call get_fmap_value,FMAP_SECTION_FLASH_START)) 142SIGNED_AMDFW_A_FILE=$(obj)/amdfw_a.rom.signed 143SIGNED_AMDFW_B_FILE=$(obj)/amdfw_b.rom.signed 144endif # CONFIG_SEPARATE_SIGNED_PSPFW 145 146# Helper function to return a value with given bit set 147# Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions. 148set-bit=$(call int-shift-left, 1 $(call _toint,$1)) 149PSP_SOFTFUSE=$(shell A=$(call int-add, \ 150 $(foreach bit,$(sort $(PSP_SOFTFUSE_BITS)),$(call set-bit,$(bit)))); printf "0x%x" $$A) 151 152# 153# Build the arguments to amdfwtool (order is unimportant). Missing file names 154# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool. 155# 156 157add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) 158 159OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) 160OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig) 161 162OPT_PSP_APCB_FILES= $(if $(APCB_SOURCES), --instance 0 --apcb $(APCB_SOURCES)) \ 163 $(if $(APCB_SOURCES_RECOVERY), --instance 10 --apcb $(APCB_SOURCES_RECOVERY)) \ 164 $(if $(APCB_SOURCES_68), --instance 18 --apcb $(APCB_SOURCES_68)) 165 166OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base) 167OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin) 168OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest) 169OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size) 170 171OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem) 172OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size) 173OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size) 174OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base) 175OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode) 176OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed) 177OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag) 178 179OPT_SIGNED_AMDFW_A_POSITION=$(call add_opt_prefix, $(SIGNED_AMDFW_A_POSITION), --signed-addr) 180OPT_SIGNED_AMDFW_A_FILE=$(call add_opt_prefix, $(SIGNED_AMDFW_A_FILE), --signed-output) 181OPT_SIGNED_AMDFW_B_POSITION=$(call add_opt_prefix, $(SIGNED_AMDFW_B_POSITION), --signed-addr) 182OPT_SIGNED_AMDFW_B_FILE=$(call add_opt_prefix, $(SIGNED_AMDFW_B_FILE), --signed-output) 183 184OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse) 185 186OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) 187OPT_SPL_TABLE_FILE=$(call add_opt_prefix, $(SPL_TABLE_FILE), --spl-table) 188OPT_SPL_RW_AB_TABLE_FILE=$(call add_opt_prefix, $(SPL_RW_AB_TABLE_FILE), --spl-table) 189 190# If vboot uses 2 RW slots, then 2 copies of PSP binaries are redundant 191OPT_RECOVERY_AB_SINGLE_COPY=$(if $(CONFIG_VBOOT_SLOTS_RW_AB), --recovery-ab-single-copy) 192 193AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ 194 $(OPT_APOB_ADDR) \ 195 $(OPT_DEBUG_AMDFWTOOL) \ 196 $(OPT_PSP_BIOSBIN_FILE) \ 197 $(OPT_PSP_BIOSBIN_DEST) \ 198 $(OPT_PSP_BIOSBIN_SIZE) \ 199 $(OPT_PSP_SOFTFUSE) \ 200 $(OPT_PSP_LOAD_MP2_FW) \ 201 --use-pspsecureos \ 202 --load-s0i3 \ 203 $(OPT_TOKEN_UNLOCK) \ 204 $(OPT_WHITELIST_FILE) \ 205 $(OPT_PSP_SHAREDMEM_BASE) \ 206 $(OPT_PSP_SHAREDMEM_SIZE) \ 207 $(OPT_EFS_SPI_READ_MODE) \ 208 $(OPT_EFS_SPI_SPEED) \ 209 $(OPT_EFS_SPI_MICRON_FLAG) \ 210 --config $(CONFIG_AMDFW_CONFIG_FILE) \ 211 --flashsize $(CONFIG_ROM_SIZE) \ 212 $(OPT_RECOVERY_AB_SINGLE_COPY) 213 214$(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ 215 $(PSP_VERSTAGE_FILE) \ 216 $(PSP_VERSTAGE_SIG_FILE) \ 217 $$(PSP_APCB_FILES) \ 218 $(DEP_FILES) \ 219 $(AMDFWTOOL) \ 220 $(obj)/fmap_config.h \ 221 $(objcbfs)/bootblock.elf # this target also creates the .map file 222 rm -f $@ 223 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" 224 $(AMDFWTOOL) \ 225 $(AMDFW_COMMON_ARGS) \ 226 $(OPT_APOB_NV_SIZE) \ 227 $(OPT_APOB_NV_BASE) \ 228 $(OPT_VERSTAGE_FILE) \ 229 $(OPT_VERSTAGE_SIG_FILE) \ 230 $(OPT_SPL_TABLE_FILE) \ 231 --location $(CONFIG_AMD_FWM_POSITION) \ 232 --output $@ 233 234$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) 235 rm -f $@ 236 @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n" 237 $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \ 238 --maxsize $(PSP_BIOSBIN_SIZE) 239 240$(obj)/amdfw_a.rom: $(obj)/amdfw.rom 241 rm -f $@ 242 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" 243 $(AMDFWTOOL) \ 244 $(AMDFW_COMMON_ARGS) \ 245 $(OPT_APOB_NV_SIZE) \ 246 $(OPT_APOB_NV_BASE) \ 247 $(OPT_SPL_RW_AB_TABLE_FILE) \ 248 $(OPT_SIGNED_AMDFW_A_POSITION) \ 249 $(OPT_SIGNED_AMDFW_A_FILE) \ 250 --location $(call _tohex,$(GLINDA_FW_A_POSITION)) \ 251 --anywhere \ 252 --output $@ 253 254$(obj)/amdfw_b.rom: $(obj)/amdfw.rom 255 rm -f $@ 256 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" 257 $(AMDFWTOOL) \ 258 $(AMDFW_COMMON_ARGS) \ 259 $(OPT_APOB_NV_SIZE) \ 260 $(OPT_APOB_NV_BASE) \ 261 $(OPT_SPL_RW_AB_TABLE_FILE) \ 262 $(OPT_SIGNED_AMDFW_B_POSITION) \ 263 $(OPT_SIGNED_AMDFW_B_FILE) \ 264 --location $(call _tohex,$(GLINDA_FW_B_POSITION)) \ 265 --anywhere \ 266 --output $@ 267 268 269ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) 270cbfs-files-y += apu/amdfw_a 271apu/amdfw_a-file := $(obj)/amdfw_a.rom 272apu/amdfw_a-position := $(AMD_FW_AB_POSITION) 273apu/amdfw_a-type := raw 274 275cbfs-files-y += apu/amdfw_b 276apu/amdfw_b-file := $(obj)/amdfw_b.rom 277apu/amdfw_b-position := $(AMD_FW_AB_POSITION) 278apu/amdfw_b-type := raw 279 280ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW),y) 281build_complete:: $(obj)/amdfw_a.rom $(obj)/amdfw_b.rom 282 @printf " Adding Signed ROM and HASH\n" 283 $(CBFSTOOL) $(obj)/coreboot.rom write -u -r SIGNED_AMDFW_A -i 0 -f $(obj)/amdfw_a.rom.signed 284 $(CBFSTOOL) $(obj)/coreboot.rom write -u -r SIGNED_AMDFW_B -i 0 -f $(obj)/amdfw_b.rom.signed 285 $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_A -f $(obj)/amdfw_a.rom.signed.hash \ 286 -n apu/amdfw_a_hash -t raw 287 $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_B -f $(obj)/amdfw_b.rom.signed.hash \ 288 -n apu/amdfw_b_hash -t raw 289endif # CONFIG_SEPARATE_SIGNED_PSPFW 290endif 291 292endif # ($(CONFIG_SOC_AMD_GLINDA),y) 293