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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /* TODO: Update for Glinda */
4 
5 #include <stdint.h>
6 #include <amdblocks/acpimmio.h>
7 #include <amdblocks/aoac.h>
8 #include <soc/aoac_defs.h>
9 #include <soc/southbridge.h>
10 #include <delay.h>
11 
12 #define FCH_AOAC_UART_FOR_CONSOLE \
13 		(CONFIG_UART_FOR_CONSOLE == 0 ? FCH_AOAC_DEV_UART0 \
14 		: CONFIG_UART_FOR_CONSOLE == 1 ? FCH_AOAC_DEV_UART1 \
15 		: CONFIG_UART_FOR_CONSOLE == 2 ? FCH_AOAC_DEV_UART2 \
16 		: CONFIG_UART_FOR_CONSOLE == 3 ? FCH_AOAC_DEV_UART3 \
17 		: CONFIG_UART_FOR_CONSOLE == 4 ? FCH_AOAC_DEV_UART4 \
18 		: -1)
19 #if CONFIG(AMD_SOC_CONSOLE_UART) && FCH_AOAC_UART_FOR_CONSOLE == -1
20 # error Unsupported UART_FOR_CONSOLE chosen
21 #endif
22 
23 /*
24  * Table of devices that need their AOAC registers enabled and waited
25  * upon (usually about .55 milliseconds). Instead of individual delays
26  * waiting for each device to become available, a single delay will be
27  * executed.  The console UART is handled separately from this table.
28  *
29  * TODO: Find out which I2C controllers we really need to enable here.
30  */
31 static const unsigned int aoac_devs[] = {
32 	FCH_AOAC_DEV_AMBA,
33 	FCH_AOAC_DEV_I2C0,
34 	FCH_AOAC_DEV_I2C1,
35 	FCH_AOAC_DEV_I2C2,
36 	FCH_AOAC_DEV_I2C3,
37 	FCH_AOAC_DEV_ESPI,
38 };
39 
wait_for_aoac_enabled(unsigned int dev)40 void wait_for_aoac_enabled(unsigned int dev)
41 {
42 	while (!is_aoac_device_enabled(dev))
43 		udelay(100);
44 }
45 
enable_aoac_devices(void)46 void enable_aoac_devices(void)
47 {
48 	unsigned int i;
49 
50 	for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
51 		power_on_aoac_device(aoac_devs[i]);
52 
53 	if (CONFIG(AMD_SOC_CONSOLE_UART))
54 		power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
55 
56 	/* Wait for AOAC devices to indicate power and clock OK */
57 	for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
58 		wait_for_aoac_enabled(aoac_devs[i]);
59 
60 	if (CONFIG(AMD_SOC_CONSOLE_UART))
61 		wait_for_aoac_enabled(FCH_AOAC_UART_FOR_CONSOLE);
62 }
63