1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 /* TODO: Update for Glinda */
4
5 #include <acpi/acpigen_pci.h>
6 #include <amdblocks/acpi.h>
7 #include <amdblocks/data_fabric.h>
8 #include <amdblocks/fsp.h>
9 #include <amdblocks/root_complex.h>
10 #include <console/console.h>
11 #include <device/device.h>
12 #include <device/pci.h>
13 #include <soc/cpu.h>
14 #include <soc/pci_devs.h>
15 #include <soc/southbridge.h>
16 #include <types.h>
17 #include "chip.h"
18
soc_acpi_name(const struct device * dev)19 static const char *soc_acpi_name(const struct device *dev)
20 {
21 if (dev->path.type == DEVICE_PATH_DOMAIN)
22 return "PCI0";
23
24 if (dev->path.type != DEVICE_PATH_PCI)
25 return NULL;
26
27 printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n",
28 PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
29 return NULL;
30 };
31
32 struct device_operations glinda_pci_domain_ops = {
33 .read_resources = amd_pci_domain_read_resources,
34 .set_resources = pci_domain_set_resources,
35 .scan_bus = amd_pci_domain_scan_bus,
36 .init = amd_pci_domain_init,
37 .acpi_name = soc_acpi_name,
38 .acpi_fill_ssdt = pci_domain_fill_ssdt,
39 };
40
soc_init(void * chip_info)41 static void soc_init(void *chip_info)
42 {
43 default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
44
45 amd_fsp_silicon_init();
46
47 data_fabric_print_mmio_conf();
48
49 fch_init(chip_info);
50 }
51
soc_final(void * chip_info)52 static void soc_final(void *chip_info)
53 {
54 fch_final(chip_info);
55 }
56
57 struct chip_operations soc_amd_glinda_ops = {
58 .name = "AMD Glinda SoC",
59 .init = soc_init,
60 .final = soc_final
61 };
62