1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 /* TODO: Update for Glinda */
4
5 #include <acpi/acpi.h>
6 #include <amdblocks/acpi.h>
7 #include <amdblocks/acpimmio.h>
8 #include <amdblocks/psp.h>
9 #include <amdblocks/smi.h>
10 #include <amdblocks/smm.h>
11 #include <arch/hlt.h>
12 #include <arch/io.h>
13 #include <console/console.h>
14 #include <cpu/x86/cache.h>
15 #include <cpu/x86/smm.h>
16 #include <elog.h>
17 #include <soc/smi.h>
18 #include <soc/smu.h>
19 #include <soc/southbridge.h>
20 #include <types.h>
21
22 /*
23 * Both the psp_notify_sx_info and the smu_sx_entry call will clobber the SMN index register
24 * during the SMN accesses. Since the SMI handler is the last thing that gets called before
25 * entering S3, this won't interfere with any indirect SMN accesses via the same register pair.
26 */
fch_slp_typ_handler(void)27 static void fch_slp_typ_handler(void)
28 {
29 uint32_t pci_ctrl, reg32;
30 uint16_t pm1cnt, reg16;
31 uint8_t slp_typ, rst_ctrl;
32
33 /* Figure out SLP_TYP */
34 pm1cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK);
35 printk(BIOS_SPEW, "SMI#: SLP = 0x%04x\n", pm1cnt);
36 slp_typ = acpi_sleep_from_pm1(pm1cnt);
37
38 /* Do any mainboard sleep handling */
39 mainboard_smi_sleep(slp_typ);
40
41 switch (slp_typ) {
42 case ACPI_S0:
43 printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n");
44 break;
45 case ACPI_S3:
46 printk(BIOS_DEBUG, "SMI#: Entering S3 (Suspend-To-RAM)\n");
47 break;
48 case ACPI_S4:
49 printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n");
50 break;
51 case ACPI_S5:
52 printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n");
53 break;
54 default:
55 printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n");
56 break;
57 }
58
59 if (slp_typ >= ACPI_S3) {
60 wbinvd();
61
62 clear_all_smi_status();
63
64 /* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
65 pci_ctrl = pm_read32(PM_PCI_CTRL);
66 pci_ctrl &= ~FORCE_SLPSTATE_RETRY;
67 pm_write32(PM_PCI_CTRL, pci_ctrl);
68
69 /* Enable SlpTyp */
70 rst_ctrl = pm_read8(PM_RST_CTRL1);
71 rst_ctrl |= SLPTYPE_CONTROL_EN;
72 pm_write8(PM_RST_CTRL1, rst_ctrl);
73
74 /*
75 * Before the final command, check if there's pending wake
76 * event. Read enable first, so that reading the actual status
77 * is as close as possible to entering S3. The idea is to
78 * minimize the opportunity for a wake event to happen before
79 * actually entering S3. If there's a pending wake event, log
80 * it and continue normal path. S3 will fail and the wake event
81 * becomes a SCI.
82 */
83 if (CONFIG(ELOG_GSMI)) {
84 reg16 = acpi_read16(MMIO_ACPI_PM1_EN);
85 reg16 &= acpi_read16(MMIO_ACPI_PM1_STS);
86 if (reg16)
87 elog_add_extended_event(
88 ELOG_SLEEP_PENDING_PM1_WAKE,
89 (u32)reg16);
90
91 reg32 = acpi_read32(MMIO_ACPI_GPE0_EN);
92 reg32 &= acpi_read32(MMIO_ACPI_GPE0_STS);
93 if (reg32)
94 elog_add_extended_event(
95 ELOG_SLEEP_PENDING_GPE0_WAKE,
96 reg32);
97 } /* if (CONFIG(ELOG_GSMI)) */
98
99 if (slp_typ == ACPI_S3)
100 psp_notify_sx_info(ACPI_S3);
101
102 smu_sx_entry(); /* Leave SlpTypeEn clear, SMU will set */
103 printk(BIOS_ERR, "System did not go to sleep\n");
104 hlt();
105 }
106 }
107
108 /*
109 * Table of functions supported in the SMI handler. Note that SMI source setup
110 * in fch.c is unrelated to this list.
111 */
112 static const struct smi_sources_t smi_sources[] = {
113 { .type = SMITYPE_SMI_CMD_PORT, .handler = fch_apmc_smi_handler },
114 { .type = SMITYPE_SLP_TYP, .handler = fch_slp_typ_handler},
115 };
116
get_smi_source_handler(int source)117 void *get_smi_source_handler(int source)
118 {
119 size_t i;
120
121 for (i = 0 ; i < ARRAY_SIZE(smi_sources) ; i++)
122 if (smi_sources[i].type == source)
123 return smi_sources[i].handler;
124
125 return NULL;
126 }
127