1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 /* TODO: Update for Glinda */
4
5 #include <amdblocks/gpio.h>
6 #include <amdblocks/smi.h>
7 #include <bootstate.h>
8 #include <device/device.h>
9 #include <device/pci_ids.h>
10 #include <drivers/usb/pci_xhci/pci_xhci.h>
11 #include <soc/pci_devs.h>
12 #include <soc/smi.h>
13
14 static const struct sci_source xhci_sci_sources[] = {
15 {
16 .scimap = SMITYPE_XHC0_PME,
17 .gpe = GEVENT_31,
18 .direction = SMI_SCI_LVL_HIGH,
19 .level = SMI_SCI_EDG
20 },
21 {
22 .scimap = SMITYPE_XHC1_PME,
23 .gpe = GEVENT_31,
24 .direction = SMI_SCI_LVL_HIGH,
25 .level = SMI_SCI_EDG
26 },
27 {
28 .scimap = SMITYPE_XHC2_PME,
29 .gpe = GEVENT_31,
30 .direction = SMI_SCI_LVL_HIGH,
31 .level = SMI_SCI_EDG
32 }
33 };
34
pci_xhci_get_wake_gpe(const struct device * dev,int * gpe)35 enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
36 {
37 if (dev->upstream->dev->path.type != DEVICE_PATH_PCI)
38 return CB_ERR_ARG;
39
40 if (dev->path.type != DEVICE_PATH_PCI)
41 return CB_ERR_ARG;
42
43 if (dev->upstream->dev->path.pci.devfn == PCIE_ABC_A_DEVFN) {
44 if (dev->path.pci.devfn == XHCI0_DEVFN) {
45 *gpe = xhci_sci_sources[0].gpe;
46 return CB_SUCCESS;
47 } else if (dev->path.pci.devfn == XHCI1_DEVFN) {
48 *gpe = xhci_sci_sources[1].gpe;
49 return CB_SUCCESS;
50 }
51 } else if (dev->upstream->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) {
52 if (dev->path.pci.devfn == XHCI2_DEVFN
53 && dev->device == PCI_DID_AMD_FAM17H_MODELA0H_XHCI2) {
54 *gpe = xhci_sci_sources[2].gpe;
55 return CB_SUCCESS;
56 }
57 }
58
59 return CB_ERR_ARG;
60 }
61
configure_xhci_sci(void * unused)62 static void configure_xhci_sci(void *unused)
63 {
64 gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources) - 1);
65 }
66
67 BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL);
68