1# SPDX-License-Identifier: BSD-3-Clause 2 3# TODO: Move as much as possible to common 4# TODO: Update for Phoenix 5 6ifeq ($(CONFIG_SOC_AMD_PHOENIX_BASE),y) 7 8subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage 9 10# Beware that all-y also adds the compilation unit to verstage on PSP 11all-y += aoac.c 12all-y += config.c 13all-y += i2c.c 14 15# all_x86-y adds the compilation unit to all stages that run on the x86 cores 16all_x86-y += gpio.c 17all_x86-y += uart.c 18 19bootblock-y += early_fch.c 20bootblock-y += espi_util.c 21 22verstage-y += espi_util.c 23 24romstage-$(CONFIG_SOC_AMD_PHOENIX_FSP) += fsp_m_params.c 25romstage-y += soc_util.c 26 27ramstage-y += acpi.c 28ramstage-y += chip.c 29ramstage-y += cpu.c 30ramstage-y += fch.c 31ramstage-$(CONFIG_SOC_AMD_PHOENIX_FSP) += fsp_s_params.c 32ramstage-y += graphics.c 33ramstage-y += mca.c 34ramstage-y += memmap.c 35ramstage-$(CONFIG_SOC_AMD_PHOENIX_OPENSIL) += pci_irq_routing.c 36ramstage-y += root_complex.c 37ramstage-y += soc_util.c 38ramstage-y += xhci.c 39 40smm-y += gpio.c 41smm-y += smihandler.c 42smm-$(CONFIG_DEBUG_SMI) += uart.c 43 44CPPFLAGS_common += -I$(src)/soc/amd/phoenix/include 45CPPFLAGS_common += -I$(src)/soc/amd/phoenix/acpi 46 47ifeq ($(CONFIG_SOC_AMD_PHOENIX_FSP),y) 48CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/phoenix 49CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common 50endif 51 52# Building the cbfs image will fail if the offset, aligned to 64 bytes, isn't large enough 53ifeq ($(CONFIG_CBFS_VERIFICATION),y) 54# 0x80 accounts for the cbfs_file struct + filename + metadata structs 55AMD_FW_AB_POSITION := 0x80 56else # ($(CONFIG_CBFS_VERIFICATION), y) 57# 0x40 accounts for the cbfs_file struct + filename + metadata structs without hash attribute 58AMD_FW_AB_POSITION := 0x40 59endif # ($(CONFIG_CBFS_VERIFICATION), y) 60 61PHOENIX_FW_A_POSITION=$(call int-add, \ 62 $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION)) 63 64PHOENIX_FW_B_POSITION=$(call int-add, \ 65 $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION)) 66 67FMAP_FLASH_START=$(call get_fmap_value,FMAP_SECTION_FLASH_START) 68 69# 70# PSP Directory Table items 71# 72# Certain ordering requirements apply, however these are ensured by amdfwtool. 73# For more information see "AMD Platform Security Processor BIOS Architecture 74# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). 75# 76 77ifeq ($(CONFIG_PSP_DISABLE_POSTCODES),y) 78PSP_SOFTFUSE_BITS += 7 79endif 80 81ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y) 82# Enable secure debug unlock 83PSP_SOFTFUSE_BITS += 0 84OPT_TOKEN_UNLOCK="--token-unlock" 85endif 86 87ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y) 88OPT_PSP_LOAD_MP2_FW="--load-mp2-fw" 89else 90# Disable MP2 firmware loading 91PSP_SOFTFUSE_BITS += 29 92endif 93 94# Use additional Soft Fuse bits specified in Kconfig 95PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS)) 96 97# type = 0x3a 98ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) 99PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) 100endif 101 102# type = 0x55 103SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE) 104ifeq ($(CONFIG_HAVE_SPL_RW_AB_FILE),y) 105SPL_RW_AB_TABLE_FILE=$(CONFIG_SPL_RW_AB_TABLE_FILE) 106else 107SPL_RW_AB_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE) 108endif 109 110# 111# BIOS Directory Table items - proper ordering is managed by amdfwtool 112# 113 114# type = 0x60 115PSP_APCB_FILES=$(APCB_SOURCES) $(APCB_SOURCES_RECOVERY) 116 117# type = 0x61 118PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS) 119 120# type = 0x62 121PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img 122PSP_ELF_FILE=$(objcbfs)/bootblock.elf 123PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}') 124PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}') 125 126ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y) 127# type = 0x63 - construct APOB NV base/size from flash map 128# The flashmap section used for this is expected to be named RW_MRC_CACHE 129APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE) 130APOB_NV_BASE=$(call _tohex,$(call int-subtract, \ 131 $(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) $(FMAP_FLASH_START))) 132 133ifeq ($(CONFIG_HAS_RECOVERY_MRC_CACHE)$(CONFIG_VBOOT),yy) 134# On boards with recovery MRC cache, point type 0x63 entry to RECOVERY_MRC_CACHE. 135# Else use RW_MRC_CACHE. This entry will be added in the RO section. 136APOB_NV_RO_SIZE=$(call get_fmap_value,FMAP_SECTION_RECOVERY_MRC_CACHE_SIZE) 137APOB_NV_RO_BASE=$(call _tohex,$(call int-subtract, \ 138 $(call get_fmap_value,FMAP_SECTION_RECOVERY_MRC_CACHE_START) $(FMAP_FLASH_START))) 139else 140APOB_NV_RO_SIZE=$(APOB_NV_SIZE) 141APOB_NV_RO_BASE=$(APOB_NV_BASE) 142endif 143endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE 144 145ifeq ($(CONFIG_AMDFW_SPLIT),y) 146FMAP_AMDFW_BODY_LOCATION=$(call get_fmap_value,FMAP_SECTION_AMDFWBODY_START) 147endif 148 149ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) 150# type = 0x6B - PSP Shared memory location 151ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0) 152PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE) 153PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map) 154endif 155 156# type = 0x52 - PSP Bootloader Userspace Application (verstage) 157PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE)) 158PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN)) 159endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK 160 161ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW),y) 162SIGNED_AMDFW_A_POSITION=$(call int-subtract, \ 163 $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_A_START) $(FMAP_FLASH_START)) 164SIGNED_AMDFW_B_POSITION=$(call int-subtract, \ 165 $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_B_START) $(FMAP_FLASH_START)) 166SIGNED_AMDFW_A_FILE=$(obj)/amdfw_a.rom.signed 167SIGNED_AMDFW_B_FILE=$(obj)/amdfw_b.rom.signed 168endif # CONFIG_SEPARATE_SIGNED_PSPFW 169 170# Helper function to return a value with given bit set 171# Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions. 172set-bit=$(call int-shift-left, 1 $(call _toint,$1)) 173PSP_SOFTFUSE=$(shell A=$(call int-add, \ 174 $(foreach bit,$(sort $(PSP_SOFTFUSE_BITS)),$(call set-bit,$(bit)))); printf "0x%x" $$A) 175 176# 177# Build the arguments to amdfwtool (order is unimportant). Missing file names 178# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool. 179# 180 181add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) 182 183OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) 184OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig) 185 186OPT_PSP_APCB_FILES= $(if $(APCB_SOURCES), --instance 0 --apcb $(APCB_SOURCES)) \ 187 $(if $(APCB_SOURCES_RECOVERY), --instance 10 --apcb $(APCB_SOURCES_RECOVERY)) \ 188 $(if $(APCB_SOURCES_68), --instance 18 --apcb $(APCB_SOURCES_68)) 189 190OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base) 191OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin) 192OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest) 193OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size) 194 195OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem) 196OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size) 197OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size) 198OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base) 199OPT_APOB_NV_RO_SIZE=$(call add_opt_prefix, $(APOB_NV_RO_SIZE), --apob-nv-size) 200OPT_APOB_NV_RO_BASE=$(call add_opt_prefix, $(APOB_NV_RO_BASE),--apob-nv-base) 201OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode) 202OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed) 203OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag) 204 205OPT_SIGNED_AMDFW_A_POSITION=$(call add_opt_prefix, $(SIGNED_AMDFW_A_POSITION), --signed-addr) 206OPT_SIGNED_AMDFW_A_FILE=$(call add_opt_prefix, $(SIGNED_AMDFW_A_FILE), --signed-output) 207OPT_SIGNED_AMDFW_B_POSITION=$(call add_opt_prefix, $(SIGNED_AMDFW_B_POSITION), --signed-addr) 208OPT_SIGNED_AMDFW_B_FILE=$(call add_opt_prefix, $(SIGNED_AMDFW_B_FILE), --signed-output) 209 210OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse) 211 212OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) 213OPT_SPL_TABLE_FILE=$(call add_opt_prefix, $(SPL_TABLE_FILE), --spl-table) 214OPT_SPL_RW_AB_TABLE_FILE=$(call add_opt_prefix, $(SPL_RW_AB_TABLE_FILE), --spl-table) 215 216# If vboot uses 2 RW slots, then 2 copies of PSP binaries are redundant 217OPT_RECOVERY_AB_SINGLE_COPY=$(if $(CONFIG_VBOOT_SLOTS_RW_AB), --recovery-ab-single-copy) 218 219OPT_AMDFW_BODY_LOCATION=$(call add_opt_prefix, $(FMAP_AMDFW_BODY_LOCATION), --body-location) 220 221MANIFEST_FILE=$(obj)/amdfw_manifest 222OPT_MANIFEST=$(call add_opt_prefix, $(MANIFEST_FILE), --output-manifest) 223 224AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ 225 $(OPT_APOB_ADDR) \ 226 $(OPT_DEBUG_AMDFWTOOL) \ 227 $(OPT_PSP_BIOSBIN_FILE) \ 228 $(OPT_PSP_BIOSBIN_DEST) \ 229 $(OPT_PSP_BIOSBIN_SIZE) \ 230 $(OPT_PSP_SOFTFUSE) \ 231 $(OPT_PSP_LOAD_MP2_FW) \ 232 --use-pspsecureos \ 233 --load-s0i3 \ 234 $(OPT_TOKEN_UNLOCK) \ 235 $(OPT_WHITELIST_FILE) \ 236 $(OPT_PSP_SHAREDMEM_BASE) \ 237 $(OPT_PSP_SHAREDMEM_SIZE) \ 238 $(OPT_EFS_SPI_READ_MODE) \ 239 $(OPT_EFS_SPI_SPEED) \ 240 $(OPT_EFS_SPI_MICRON_FLAG) \ 241 --config $(CONFIG_AMDFW_CONFIG_FILE) \ 242 --flashsize $(CONFIG_ROM_SIZE) \ 243 $(OPT_RECOVERY_AB_SINGLE_COPY) \ 244 $(OPT_AMDFW_BODY_LOCATION) 245 246$(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ 247 $(PSP_VERSTAGE_FILE) \ 248 $(PSP_VERSTAGE_SIG_FILE) \ 249 $$(PSP_APCB_FILES) \ 250 $(DEP_FILES) \ 251 $(AMDFWTOOL) \ 252 $(obj)/fmap_config.h \ 253 $(objcbfs)/bootblock.elf # this target also creates the .map file 254 rm -f $@ 255 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" 256 $(AMDFWTOOL) \ 257 $(AMDFW_COMMON_ARGS) \ 258 $(OPT_APOB_NV_RO_SIZE) \ 259 $(OPT_APOB_NV_RO_BASE) \ 260 $(OPT_VERSTAGE_FILE) \ 261 $(OPT_VERSTAGE_SIG_FILE) \ 262 $(OPT_SPL_TABLE_FILE) \ 263 $(OPT_MANIFEST) \ 264 --location $(CONFIG_AMD_FWM_POSITION) \ 265 --output $@ 266 267ifeq ($(CONFIG_AMDFW_SPLIT),y) 268$(obj)/amdfw.rom.body: $(obj)/amdfw.rom 269$(call add_intermediate, add_amdfwbody, $(obj)/amdfw.rom.body) 270 $(CBFSTOOL) $(obj)/coreboot.pre write -r AMDFWBODY -f $(obj)/amdfw.rom.body --fill-upward 271endif 272 273$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) 274 rm -f $@ 275 @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n" 276 $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \ 277 --maxsize $(PSP_BIOSBIN_SIZE) 278 279$(obj)/amdfw_a.rom: $(obj)/amdfw.rom 280 rm -f $@ 281 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" 282 $(AMDFWTOOL) \ 283 $(AMDFW_COMMON_ARGS) \ 284 $(OPT_APOB_NV_SIZE) \ 285 $(OPT_APOB_NV_BASE) \ 286 $(OPT_SPL_RW_AB_TABLE_FILE) \ 287 $(OPT_SIGNED_AMDFW_A_POSITION) \ 288 $(OPT_SIGNED_AMDFW_A_FILE) \ 289 --location $(call _tohex,$(PHOENIX_FW_A_POSITION)) \ 290 --anywhere \ 291 --output $@ 292 293$(obj)/amdfw_b.rom: $(obj)/amdfw.rom 294 rm -f $@ 295 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" 296 $(AMDFWTOOL) \ 297 $(AMDFW_COMMON_ARGS) \ 298 $(OPT_APOB_NV_SIZE) \ 299 $(OPT_APOB_NV_BASE) \ 300 $(OPT_SPL_RW_AB_TABLE_FILE) \ 301 $(OPT_SIGNED_AMDFW_B_POSITION) \ 302 $(OPT_SIGNED_AMDFW_B_FILE) \ 303 --location $(call _tohex,$(PHOENIX_FW_B_POSITION)) \ 304 --anywhere \ 305 --output $@ 306 307 308$(MANIFEST_FILE): $(obj)/amdfw.rom 309cbfs-files-y += amdfw_manifest 310amdfw_manifest-file := $(MANIFEST_FILE) 311amdfw_manifest-type := raw 312 313ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) 314cbfs-files-y += apu/amdfw_a 315apu/amdfw_a-file := $(obj)/amdfw_a.rom 316apu/amdfw_a-position := $(AMD_FW_AB_POSITION) 317apu/amdfw_a-type := raw 318 319cbfs-files-y += apu/amdfw_b 320apu/amdfw_b-file := $(obj)/amdfw_b.rom 321apu/amdfw_b-position := $(AMD_FW_AB_POSITION) 322apu/amdfw_b-type := raw 323 324ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW),y) 325build_complete:: $(obj)/amdfw_a.rom $(obj)/amdfw_b.rom 326 @printf " Adding Signed ROM and HASH\n" 327 $(CBFSTOOL) $(obj)/coreboot.rom write -u -r SIGNED_AMDFW_A -i 0 -f $(obj)/amdfw_a.rom.signed 328 $(CBFSTOOL) $(obj)/coreboot.rom write -u -r SIGNED_AMDFW_B -i 0 -f $(obj)/amdfw_b.rom.signed 329 $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_A -f $(obj)/amdfw_a.rom.signed.hash \ 330 -n apu/amdfw_a_hash -t raw 331 $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_B -f $(obj)/amdfw_b.rom.signed.hash \ 332 -n apu/amdfw_b_hash -t raw 333 if [ -n "$(wildcard $(obj)/amdfw_a.rom.signed.1.hash)" ]; then \ 334 $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_A -f \ 335 $(obj)/amdfw_a.rom.signed.1.hash -n apu/amdfw_a_hash1 -t raw; \ 336 $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_B -f \ 337 $(obj)/amdfw_b.rom.signed.1.hash -n apu/amdfw_b_hash1 -t raw; \ 338 fi 339 if [ -n "$(wildcard $(obj)/amdfw_a.rom.signed.2.hash)" ]; then \ 340 $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_A -f \ 341 $(obj)/amdfw_a.rom.signed.2.hash -n apu/amdfw_a_hash2 -t raw; \ 342 $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_B -f \ 343 $(obj)/amdfw_b.rom.signed.2.hash -n apu/amdfw_b_hash2 -t raw; \ 344 fi 345endif # CONFIG_SEPARATE_SIGNED_PSPFW 346endif 347 348# Add ranges for all components up until the first segment of BIOS to be verified by GSC 349ifeq ($(CONFIG_VBOOT_GSCVD),y) 350# Adding range for Bootblock 351vboot-gscvd-ranges += $(call amdfwread-range-cmd,BIOSL2: 0x62) 352# Adding range for PSP Stage1 Bootloader 353vboot-gscvd-ranges += $(call amdfwread-range-cmd,PSPL2: 0x01) 354 355ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) 356# Adding range for PSP Verstage 357vboot-gscvd-ranges += $(call amdfwread-range-cmd,PSPL2: 0x52) 358endif # ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) 359endif # ifeq ($(CONFIG_VBOOT_GSCVD),y) 360 361endif # ($(CONFIG_SOC_AMD_PHOENIX_BASE),y) 362