1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <amdblocks/gpio.h>
4 #include <amdblocks/smi.h>
5 #include <amdblocks/xhci.h>
6 #include <bootstate.h>
7 #include <device/device.h>
8 #include <device/pci_ids.h>
9 #include <drivers/usb/pci_xhci/pci_xhci.h>
10 #include <soc/pci_devs.h>
11 #include <soc/smi.h>
12
13 static const struct sci_source xhci_sci_sources[] = {
14 {
15 .scimap = SMITYPE_XHC0_PME,
16 .gpe = XHCI_GEVENT,
17 .direction = SMI_SCI_LVL_HIGH,
18 .level = SMI_SCI_EDG
19 },
20 {
21 .scimap = SMITYPE_XHC1_PME,
22 .gpe = XHCI_GEVENT,
23 .direction = SMI_SCI_LVL_HIGH,
24 .level = SMI_SCI_EDG
25 },
26 {
27 .scimap = SMITYPE_XHC3_PME,
28 .gpe = XHCI_GEVENT,
29 .direction = SMI_SCI_LVL_HIGH,
30 .level = SMI_SCI_EDG
31 },
32 {
33 .scimap = SMITYPE_XHC4_PME,
34 .gpe = XHCI_GEVENT,
35 .direction = SMI_SCI_LVL_HIGH,
36 .level = SMI_SCI_EDG
37 }
38 };
39
pci_xhci_get_wake_gpe(const struct device * dev,int * gpe)40 enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
41 {
42 if (dev->upstream->dev->path.type != DEVICE_PATH_PCI)
43 return CB_ERR_ARG;
44
45 if (dev->path.type != DEVICE_PATH_PCI)
46 return CB_ERR_ARG;
47
48 if (dev->upstream->dev->path.pci.devfn == PCIE_ABC_A_DEVFN) {
49 if (dev->path.pci.devfn == XHCI0_DEVFN) {
50 *gpe = xhci_sci_sources[0].gpe;
51 return CB_SUCCESS;
52 } else if (dev->path.pci.devfn == XHCI1_DEVFN) {
53 *gpe = xhci_sci_sources[1].gpe;
54 return CB_SUCCESS;
55 }
56 }
57
58 if (dev->upstream->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) {
59 if (dev->path.pci.devfn == USB4_XHCI0_DEVFN) {
60 *gpe = xhci_sci_sources[2].gpe;
61 return CB_SUCCESS;
62 } else if (dev->path.pci.devfn == USB4_XHCI1_DEVFN) {
63 *gpe = xhci_sci_sources[3].gpe;
64 return CB_SUCCESS;
65 }
66 }
67
68 return CB_ERR_ARG;
69 }
70
configure_xhci_sci(void * unused)71 static void configure_xhci_sci(void *unused)
72 {
73 gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources));
74 }
75
76 BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL);
77