1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2 3/* 4 * NOTE: The layout of the GNVS structure below must match the layout in 5 * soc/amd/stoneyridge/include/soc/nvs.h !!! 6 * 7 */ 8 9Field (GNVS, ByteAcc, NoLock, Preserve) 10{ 11 /* Miscellaneous */ 12 PM1I, 64, // 0x00 - 0x07 - System Wake Source - PM1 Index 13 GPEI, 64, // 0x08 - 0x0f - GPE Wake Source 14 TMPS, 8, // 0x10 - Temperature Sensor ID 15 TCRT, 8, // 0x11 - Critical Threshold 16 TPSV, 8, // 0x12 - Passive Threshold 17 Offset (0x20), // 0x20 - AOAC Device Enables 18 , 5, 19 IC0E, 1, // I2C0, 5 20 IC1E, 1, // I2C1, 6 21 IC2E, 1, // I2C2, 7 22 IC3E, 1, // I2C3, 8 23 , 2, 24 UT0E, 1, // UART0, 11 25 UT1E, 1, // UART1, 12 26 , 2, 27 ST_E, 1, // SATA, 15 28 , 2, 29 EHCE, 1, // EHCI, 18 30 , 4, 31 XHCE, 1, // XCHI, 23 32 SD_E, 1, // SD, 24 33 , 2, 34 ESPI, 1, // ESPI, 27 35 , 4, 36 FW00, 16, // 0x24 - xHCI FW ROM addr, boot RAM 37 FW02, 16, // 0x26 - xHCI FW ROM addr, Instruction RAM 38 FW01, 32, // 0x28 - xHCI FW RAM addr, boot RAM 39 FW03, 32, // 0x2c - xHCI FW RAM addr, Instruction RAM 40 EH10, 32, // 0x30 - EHCI BAR 41} 42