1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #include <amdblocks/smm.h> 4 #include <assert.h> 5 #include <stdint.h> 6 #include <cpu/x86/msr.h> 7 #include <cpu/x86/smm.h> 8 #include <cpu/amd/mtrr.h> 9 #include <cbmem.h> 10 #include <soc/northbridge.h> 11 #include <soc/iomap.h> 12 #include <amdblocks/biosram.h> 13 cbmem_top_chipset(void)14uintptr_t cbmem_top_chipset(void) 15 { 16 if (!get_top_of_mem_below_4gb()) 17 return 0; 18 19 /* 8MB alignment to keep MTRR usage low */ 20 return ALIGN_DOWN(restore_top_of_low_cacheable() - CONFIG_SMM_TSEG_SIZE, 8 * MiB); 21 } 22 smm_region_start(void)23static uintptr_t smm_region_start(void) 24 { 25 return cbmem_top(); 26 } 27 smm_region_size(void)28static size_t smm_region_size(void) 29 { 30 return CONFIG_SMM_TSEG_SIZE; 31 } 32 smm_region(uintptr_t * start,size_t * size)33void smm_region(uintptr_t *start, size_t *size) 34 { 35 static int once; 36 37 *start = smm_region_start(); 38 *size = smm_region_size(); 39 40 if (!once) { 41 clear_tvalid(); 42 once = 1; 43 } 44 } 45