1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 /* 4 * This file is created based on Intel Alder Lake Processor PCH Datasheet 5 * Document number: 621483 6 * Chapter number: 3 7 */ 8 9 #include <console/console.h> 10 #include <intelblocks/p2sb.h> 11 p2sb_soc_get_sb_mask(uint32_t * ep_mask,size_t count)12void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count) 13 { 14 uint32_t mask; 15 16 if (count != P2SB_EP_MASK_MAX_REG) { 17 printk(BIOS_ERR, "Unable to program EPMASK registers\n"); 18 return; 19 } 20 21 /* Remove the host accessing right to PSF register range. 22 * Set p2sb PCI offset EPMASK5 [29, 28, 27, 26] to disable Sideband 23 * access for PCI Root Bridge. 24 */ 25 mask = (1 << 29) | (1 << 28) | (1 << 27) | (1 << 26); 26 27 ep_mask[P2SB_EP_MASK_5_REG] = mask; 28 29 /* 30 * Set p2sb PCI offset EPMASK7 [31, 30] to disable Sideband 31 * access for Broadcast and Multicast. 32 */ 33 mask = (1 << 31) | (1 << 30); 34 35 ep_mask[P2SB_EP_MASK_7_REG] = mask; 36 } 37