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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2#include <gpio.h>
3#include <intelblocks/pcr.h>
4#include <soc/pcr_ids.h>
5#include "gpiolib.asl"
6
7scope (\_SB) {
8
9	Device (GPO0)
10	{
11		Name (_HID, GPIO_COMM_NAME)
12		Name (_CID, GPIO_COMM_NAME)
13		Name (_DDN, GPIO_COMM_0_DESC)
14		Name (_UID, 1)
15
16		Name (RBUF, ResourceTemplate ()
17		{
18			Memory32Fixed (ReadWrite, 0, 0x4000, RMEM)
19			Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , )
20			{
21				GPIO_BANK_INT
22			}
23		})
24
25		Method (_CRS, 0x0, NotSerialized)
26		{
27			CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
28			Local0 = GPIO_COMM0_PID << PCR_PORTID_SHIFT
29			RBAS = CONFIG_PCR_BASE_ADDRESS | Local0
30			Return (^RBUF)
31		}
32
33		Method (_STA, 0x0, NotSerialized)
34		{
35			Return(0xf)
36		}
37	}
38
39	Device (GPO1)
40	{
41		Name (_HID, GPIO_COMM_NAME)
42		Name (_CID, GPIO_COMM_NAME)
43		Name (_DDN, GPIO_COMM_1_DESC)
44		Name (_UID, 2)
45
46		Name (RBUF, ResourceTemplate ()
47		{
48			Memory32Fixed (ReadWrite, 0, 0x4000, RMEM)
49			Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , )
50			{
51				GPIO_BANK_INT
52			}
53		})
54
55		Method (_CRS, 0x0, NotSerialized)
56		{
57			CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
58			Local0 = GPIO_COMM1_PID << PCR_PORTID_SHIFT
59			RBAS = CONFIG_PCR_BASE_ADDRESS | Local0
60			Return (^RBUF)
61		}
62
63		Method (_STA, 0x0, NotSerialized)
64		{
65			Return(0xf)
66		}
67	}
68
69	Device (GPO2)
70	{
71		Name (_HID, GPIO_COMM_NAME)
72		Name (_CID, GPIO_COMM_NAME)
73		Name (_DDN, GPIO_COMM_2_DESC)
74		Name (_UID, 3)
75
76		Name (RBUF, ResourceTemplate ()
77		{
78			Memory32Fixed (ReadWrite, 0, 0x4000, RMEM)
79			Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , )
80			{
81				GPIO_BANK_INT
82			}
83		})
84
85		Method (_CRS, 0x0, NotSerialized)
86		{
87			CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
88			Local0 = GPIO_COMM2_PID << PCR_PORTID_SHIFT
89			RBAS = CONFIG_PCR_BASE_ADDRESS | Local0
90			Return (^RBUF)
91		}
92
93		Method (_STA, 0x0, NotSerialized)
94		{
95			Return(0xf)
96		}
97	}
98
99	Device (GPO3)
100	{
101		Name (_HID, GPIO_COMM_NAME)
102		Name (_CID, GPIO_COMM_NAME)
103		Name (_DDN, GPIO_COMM_3_DESC)
104		Name (_UID, 4)
105
106		Name (RBUF, ResourceTemplate ()
107		{
108			Memory32Fixed (ReadWrite, 0, 0x4000, RMEM)
109			Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , )
110			{
111				GPIO_BANK_INT
112			}
113		})
114
115		Method (_CRS, 0x0, NotSerialized)
116		{
117			CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
118			Local0 = GPIO_COMM3_PID << PCR_PORTID_SHIFT
119			RBAS = CONFIG_PCR_BASE_ADDRESS | Local0
120			Return (^RBUF)
121		}
122
123		Method (_STA, 0x0, NotSerialized)
124		{
125			Return(0xf)
126		}
127	}
128
129	Scope(\_SB.PCI0) {
130		/* PERST Assertion
131		 * Note: PERST is Active High
132		 */
133		Method (PRAS, 0x1, Serialized)
134		{
135			/*
136			 * Assert PERST
137			 * local1 - to toggle Tx pin of Dw0
138			 * local2 - Address of PERST
139			 */
140			Local2 = Arg0
141			Local1 = \_SB.GPC0 (Local2)
142			Local1 |= PAD_CFG0_TX_STATE
143			\_SB.SPC0 (Local2, Local1)
144		}
145
146		/* PERST DE-Assertion */
147		Method (PRDA, 0x1, Serialized)
148		{
149			/*
150			 * De-assert PERST
151			 * local1 - to toggle Tx pin of Dw0
152			 * local2 - Address of PERST
153			 */
154			Local2 = Arg0
155			Local1 = \_SB.GPC0 (Local2)
156			Local1 &= ~PAD_CFG0_TX_STATE
157			\_SB.SPC0 (Local2, Local1)
158		}
159	}
160
161	/*
162	 * Sleep button device ASL code. We are using this device to
163	 * add the _PRW method for a dummy wake event to kernel so that
164	 * before going to sleep kernel does not clear bit 15 in ACPI
165	 * gpe0a enable register which is actually the GPIO_TIER1_SCI_EN bit.
166	 */
167	Device (SLP)
168	{
169		Name (_HID, EisaId ("PNP0C0E"))
170
171		Name (_PRW, Package() { GPE0A_GPIO_TIER1_SCI_STS, 0x3 })
172	}
173}
174
175Scope(\_GPE)
176{
177	/*
178	 * Dummy method for the Tier 1 GPIO SCI enable bit. When kernel reads
179	 * _L0F in scope GPE it sets bit for gpio_tier1_sci_en in ACPI enable
180	 * register at 0x430. For APL ACPI enable register DW0 i.e., ACPI
181	 * GPE0a_EN at 0x430 is reserved.
182	 */
183	Method(_L0F, 0) {}
184}
185