1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 3 #include <assert.h> 4 #include <intelblocks/msr.h> 5 #include <program_loading.h> 6 #include <soc/cpu.h> 7 8 /* 9 * This file supports the necessary hoops one needs to jump through since 10 * early FSP component and early stages are running from cache-as-ram. 11 */ 12 is_car_addr(uintptr_t addr)13static inline int is_car_addr(uintptr_t addr) 14 { 15 return ((addr >= CONFIG_DCACHE_RAM_BASE) && 16 (addr < (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE))); 17 } 18 platform_segment_loaded(uintptr_t start,size_t size,int flags)19void platform_segment_loaded(uintptr_t start, size_t size, int flags) 20 { 21 /* Bail out if this is not the final segment. */ 22 if (!(flags & SEG_FINAL)) 23 return; 24 25 char start_car_check = is_car_addr(start); 26 char end_car_check = is_car_addr(start + size - 1); 27 28 /* Bail out if loaded program segment does not lie in CAR region. */ 29 if (!start_car_check && !end_car_check) 30 return; 31 32 /* Loaded program segment should lie entirely within CAR region. */ 33 assert(start_car_check && end_car_check); 34 35 flush_l1d_to_l2(); 36 } 37