1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #include <device/device.h> 4 #include <device/pci.h> 5 #include <pc80/isa-dma.h> 6 #include <pc80/i8259.h> 7 #include <device/pci_ops.h> 8 #include <arch/ioapic.h> 9 #include <intelblocks/itss.h> 10 #include <intelblocks/lpc_lib.h> 11 #include <soc/iomap.h> 12 #include <soc/irq.h> 13 #include <soc/lpc.h> 14 #include <soc/pci_devs.h> 15 #include <soc/pcr_ids.h> 16 17 #include "chip.h" 18 soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])19void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]) 20 { 21 const config_t *config = config_of_soc(); 22 23 gen_io_dec[0] = config->gen1_dec; 24 gen_io_dec[1] = config->gen2_dec; 25 gen_io_dec[2] = config->gen3_dec; 26 gen_io_dec[3] = config->gen4_dec; 27 } 28 29 #if ENV_RAMSTAGE lpc_soc_init(struct device * dev)30void lpc_soc_init(struct device *dev) 31 { 32 const config_t *config = dev->chip_info; 33 34 /* Legacy initialization */ 35 isa_dma_init(); 36 pch_misc_init(); 37 38 /* Enable CLKRUN_EN for power gating LPC */ 39 lpc_enable_pci_clk_cntl(); 40 41 /* Set LPC Serial IRQ mode */ 42 lpc_set_serirq_mode(config->serirq_mode); 43 44 /* Interrupt configuration */ 45 pch_enable_ioapic(); 46 pch_pirq_init(); 47 setup_i8259(); 48 i8259_configure_irq_trigger(9, 1); 49 } 50 51 #endif 52