1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#ifndef _SOC_INTEL_ACPI_PCR_LIB_ 4#define _SOC_INTEL_ACPI_PCR_LIB_ 5 6/* Port Id lives in bits 23:16 and register offset lives in 15:0 of address. */ 7#define PCR_PORTID_SHIFT 16 8 9/* Die Index */ 10#define PCH_P2SB 0x00 11#define IOE_P2SB 0x01 12 13/* 14 * Get PCR register base for specified Die at given PID 15 * Arg0 - Die Index 16 * Arg1 - PCR Port ID 17 */ 18Method (GPCR, 2, NotSerialized) 19{ 20 if (Arg0 == PCH_P2SB) { 21 Local0 = CONFIG_PCR_BASE_ADDRESS; 22 } else { 23 if (Arg0 == IOE_P2SB) { 24 Local0 = CONFIG_IOE_PCR_BASE_ADDRESS; 25 } else { 26 Printf ("Invalid Die index (%o)\n", Arg0) 27 Return (0) 28 } 29 } 30 31 Return (Local0 + (Arg1 << PCR_PORTID_SHIFT)) 32} 33 34/* 35 * Read PCR register for specified Die at PID and offset 36 * Arg0 - Die Index 37 * Arg1 - PCR Port ID 38 * Arg2 - Register Offset 39 */ 40Method (RPCR, 3, Serialized) 41{ 42 OperationRegion (PCRD, SystemMemory, GPCR (Arg0, Arg1) + Arg2, 4) 43 Field (PCRD, DWordAcc, NoLock, Preserve) 44 { 45 DATA, 32 46 } 47 Return (DATA) 48} 49 50/* 51 * Perform PCR register AND for specified Die at PID and offset 52 * Arg0 - Die Index 53 * Arg1 - PCR Port ID 54 * Arg2 - Register Offset 55 * Arg3 - Value to AND 56 */ 57Method (APCR, 4, Serialized) 58{ 59 OperationRegion (PCRD, SystemMemory, GPCR (Arg0, Arg1) + Arg2, 4) 60 Field (PCRD, DWordAcc, NoLock, Preserve) 61 { 62 DATA, 32 63 } 64 DATA &= Arg3 65 66 /* 67 * After every write one needs to read an innocuous register 68 * to ensure the writes are completed for certain ports. This is done 69 * for all ports so that the callers don't need the per-port knowledge 70 * for each transaction. 71 */ 72 RPCR (Arg0, Arg1, Arg2) 73} 74 75/* 76 * Perform PCR register OR for specified Die at PID and offset 77 * Arg0 - Die Index 78 * Arg1 - PCR Port ID 79 * Arg2 - Register Offset 80 * Arg3 - Value to OR 81 */ 82Method (OPCR, 4, Serialized) 83{ 84 OperationRegion (PCRD, SystemMemory, GPCR (Arg0, Arg1) + Arg2, 4) 85 Field (PCRD, DWordAcc, NoLock, Preserve) 86 { 87 DATA, 32 88 } 89 DATA |= Arg3 90 91 /* 92 * After every write one needs to read an innocuous register 93 * to ensure the writes are completed for certain ports. This is done 94 * for all ports so that the callers don't need the per-port knowledge 95 * for each transaction. 96 */ 97 RPCR (Arg0, Arg1, Arg2) 98} 99 100#endif /* _SOC_INTEL_ACPI_PCR_LIB_ */ 101