1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <acpi/acpi_soundwire.h>
4 #include <console/console.h>
5 #include <device/mmio.h>
6 #include <device/soundwire.h>
7 #include <drivers/intel/soundwire/soundwire.h>
8 #include <intelblocks/pmclib.h>
9 #include <soc/pmc.h>
10 #include <stddef.h>
11 #include <string.h>
12
13 static const struct soundwire_link link_xtal_38_4 = {
14 .clock_stop_mode0_supported = 1,
15 .clock_stop_mode1_supported = 1,
16 .clock_frequencies_supported_count = 1,
17 .clock_frequencies_supported = { 4800 * KHz },
18 .default_frame_rate = 48 * KHz,
19 .default_frame_row_size = 50,
20 .default_frame_col_size = 4,
21 .dynamic_frame_shape = 1,
22 .command_error_threshold = 16,
23 };
24
25 static const struct soundwire_link link_xtal_24 = {
26 .clock_stop_mode0_supported = 1,
27 .clock_stop_mode1_supported = 1,
28 .clock_frequencies_supported_count = 1,
29 .clock_frequencies_supported = { 6 * MHz },
30 .default_frame_rate = 48 * KHz,
31 .default_frame_row_size = 125,
32 .default_frame_col_size = 2,
33 .dynamic_frame_shape = 1,
34 .command_error_threshold = 16,
35 };
36
37 static struct intel_soundwire_controller intel_controller = {
38 .acpi_address = 0x40000000,
39 .sdw = {
40 .master_list_count = 4
41 }
42 };
43
soc_fill_soundwire_controller(struct intel_soundwire_controller ** controller)44 int soc_fill_soundwire_controller(struct intel_soundwire_controller **controller)
45 {
46 const struct soundwire_link *link;
47 enum pch_pmc_xtal xtal = pmc_get_xtal_freq();
48 size_t i;
49
50 /* Select link config based on XTAL frequency and set IP clock. */
51 switch (xtal) {
52 case XTAL_24_MHZ:
53 link = &link_xtal_24;
54 intel_controller.ip_clock = 24 * MHz;
55 break;
56 case XTAL_38_4_MHZ:
57 link = &link_xtal_38_4;
58 intel_controller.ip_clock = 38400 * KHz;
59 break;
60 case XTAL_19_2_MHZ:
61 default:
62 printk(BIOS_ERR, "%s: XTAL not supported: 0x%x\n", __func__, xtal);
63 return -1;
64 }
65
66 /* Fill link config in controller map based on selected XTAL. */
67 for (i = 0; i < intel_controller.sdw.master_list_count; i++)
68 memcpy(&intel_controller.sdw.master_list[i], link, sizeof(*link));
69
70 *controller = &intel_controller;
71 return 0;
72 }
73