1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #include <cf9_reset.h> 4 #include <intelblocks/pmclib.h> 5 #include <soc/intel/common/reset.h> 6 #include <soc/me.h> 7 #include <soc/pm.h> 8 do_force_global_reset(void)9static void do_force_global_reset(void) 10 { 11 /* 12 * BIOS should ensure it does a global reset 13 * to reset both host and Intel ME by setting 14 * PCH PMC [B0:D31:F2 register offset 0xAC bit 20] 15 */ 16 pmc_global_reset_enable(true); 17 18 /* Now BIOS can write 0x06 or 0x0E to 0xCF9 port 19 * to global reset platform */ 20 do_full_reset(); 21 } 22 do_global_reset(void)23void do_global_reset(void) 24 { 25 if (!send_global_reset()) { 26 /* If ME unable to reset platform then 27 * force global reset using PMC CF9GR register*/ 28 do_force_global_reset(); 29 } 30 } 31