1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #include <device/mmio.h> 4 #include <arch/mmu.h> 5 #include <symbols.h> 6 #include <soc/symbols.h> 7 #include <soc/infracfg.h> 8 #include <soc/mcucfg.h> 9 #include <soc/mmu_operations.h> 10 mtk_soc_after_dram(void)11void mtk_soc_after_dram(void) 12 { 13 mmu_config_range(_dram_dma, REGION_SIZE(dram_dma), 14 NONSECURE_UNCACHED_MEM); 15 mtk_mmu_disable_l2c_sram(); 16 } 17 mtk_soc_disable_l2c_sram(void)18void mtk_soc_disable_l2c_sram(void) 19 { 20 /* Return L2C SRAM back to L2 cache. Set it to 512KiB which is the max 21 * available L2 cache for A53 in MT8173. */ 22 write32(&mt8173_mcucfg->mp0_ca7l_cache_config, 3 << 8); 23 /* turn off the l2c sram clock */ 24 write32(&mt8173_infracfg->infra_pdn0, L2C_SRAM_PDN); 25 } 26