1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <assert.h>
4 #include <bootmode.h>
5 #include <cbfs.h>
6 #include <commonlib/bsd/ipchksum.h>
7 #include <console/console.h>
8 #include <security/vboot/vboot_common.h>
9 #include <soc/dramc_param.h>
10 #include <soc/dramc_pi_api.h>
11 #include <soc/emi.h>
12 #include <soc/mt6358.h>
13 #include <symbols.h>
14
mt_mem_test(void)15 static int mt_mem_test(void)
16 {
17 u64 rank_size[RANK_MAX];
18
19 if (CONFIG(MEMORY_TEST)) {
20 size_t r;
21 u8 *addr = _dram;
22
23 dramc_get_rank_size(rank_size);
24
25 for (r = RANK_0; r < RANK_MAX; r++) {
26 int i;
27
28 if (rank_size[r] == 0)
29 break;
30
31 i = complex_mem_test(addr, 0x2000);
32
33 printk(BIOS_DEBUG, "[MEM] complex R/W mem test %s : %d\n",
34 (i == 0) ? "pass" : "fail", i);
35
36 if (i != 0) {
37 printk(BIOS_ERR, "DRAM memory test failed\n");
38 return -1;
39 }
40
41 addr += rank_size[r];
42 }
43 }
44
45 return 0;
46 }
47
dump_param_header(const struct dramc_param * dparam)48 static void dump_param_header(const struct dramc_param *dparam)
49 {
50 const struct dramc_param_header *header = &dparam->header;
51
52 printk(BIOS_DEBUG, "header.status = %#x\n", header->status);
53 printk(BIOS_DEBUG, "header.magic = %#x (expected: %#x)\n",
54 header->magic, DRAMC_PARAM_HEADER_MAGIC);
55 printk(BIOS_DEBUG, "header.version = %#x (expected: %#x)\n",
56 header->version, DRAMC_PARAM_HEADER_VERSION);
57 printk(BIOS_DEBUG, "header.size = %#x (expected: %#lx)\n",
58 header->size, sizeof(*dparam));
59 printk(BIOS_DEBUG, "header.config = %#x\n", header->config);
60 printk(BIOS_DEBUG, "header.flags = %#x\n", header->flags);
61 printk(BIOS_DEBUG, "header.checksum = %#x\n", header->checksum);
62 }
63
compute_checksum(const struct dramc_param * dparam)64 static u32 compute_checksum(const struct dramc_param *dparam)
65 {
66 return (u32)ipchksum(dparam->freq_params, sizeof(dparam->freq_params));
67 }
68
dram_run_fast_calibration(const struct dramc_param * dparam,u16 config)69 static int dram_run_fast_calibration(const struct dramc_param *dparam,
70 u16 config)
71 {
72 if (!is_valid_dramc_param(dparam)) {
73 printk(BIOS_WARNING,
74 "Invalid DRAM calibration data from flash\n");
75 dump_param_header(dparam);
76 return -1;
77 }
78
79 if (dparam->header.config != config) {
80 printk(BIOS_WARNING,
81 "Incompatible config for calibration data from flash "
82 "(expected: %#x, saved: %#x)\n",
83 config, dparam->header.config);
84 return -1;
85 }
86
87 const u32 checksum = compute_checksum(dparam);
88 if (dparam->header.checksum != checksum) {
89 printk(BIOS_ERR,
90 "Invalid DRAM calibration checksum from flash "
91 "(expected: %#x, saved: %#x)\n",
92 checksum, dparam->header.checksum);
93 return -1;
94 }
95
96 return 0;
97 }
98
dram_run_full_calibration(struct dramc_param * dparam,u32 ddr_geometry,u16 config)99 static int dram_run_full_calibration(struct dramc_param *dparam,
100 u32 ddr_geometry, u16 config)
101 {
102 initialize_dramc_param(dparam, config);
103
104 /* Load and run the provided blob for full-calibration if available */
105 struct prog dram = PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX "/dram");
106
107 if (cbfs_prog_stage_load(&dram))
108 return -2;
109
110 dparam->do_putc = do_putchar;
111 dparam->freq_params[0].ddr_geometry = ddr_geometry;
112 printk(BIOS_INFO, "ddr_geometry: %d, config: %#x\n", ddr_geometry, config);
113 prog_set_entry(&dram, prog_entry(&dram), dparam);
114 prog_run(&dram);
115
116 if (dparam->header.status != DRAMC_SUCCESS) {
117 printk(BIOS_ERR, "Full calibration failed: status = %d\n",
118 dparam->header.status);
119 return -3;
120 }
121
122 if (!(dparam->header.flags & DRAMC_FLAG_HAS_SAVED_DATA)) {
123 printk(BIOS_ERR,
124 "Full calibration executed without saving parameters. "
125 "Please ensure the blob is built properly.\n");
126 return -4;
127 }
128
129 return 0;
130 }
131
set_source_to_flash(struct sdram_params * freq_params)132 static void set_source_to_flash(struct sdram_params *freq_params)
133 {
134 for (u8 shuffle = DRAM_DFS_SHUFFLE_1; shuffle < DRAM_DFS_SHUFFLE_MAX;
135 shuffle++)
136 freq_params[shuffle].source = DRAMC_PARAM_SOURCE_FLASH;
137 }
138
init_sdram_params(struct sdram_params * dst,const struct sdram_params * src)139 static void init_sdram_params(struct sdram_params *dst,
140 const struct sdram_params *src)
141 {
142 for (u8 shuffle = DRAM_DFS_SHUFFLE_1; shuffle < DRAM_DFS_SHUFFLE_MAX;
143 shuffle++)
144 memcpy(&dst[shuffle], src, sizeof(*dst));
145 }
146
mt_mem_init_run(struct dramc_param_ops * dparam_ops)147 static void mt_mem_init_run(struct dramc_param_ops *dparam_ops)
148 {
149 struct dramc_param *dparam = dparam_ops->param;
150
151 u16 config = 0;
152 if (CONFIG(MT8183_DRAM_EMCP))
153 config |= DRAMC_CONFIG_EMCP;
154
155 const bool recovery_mode = vboot_recovery_mode_enabled();
156
157 /* DRAM DVFS is disabled in recovery mode */
158 if (CONFIG(MT8183_DRAM_DVFS) && !recovery_mode)
159 config |= DRAMC_CONFIG_DVFS;
160
161 /* Load calibration params from flash and run fast calibration */
162 if (recovery_mode) {
163 printk(BIOS_WARNING, "Skip loading cached calibration data\n");
164 if (get_recovery_mode_retrain_switch()) {
165 printk(BIOS_WARNING, "Retrain memory in next boot\n");
166 /* Use 0xFF as erased flash data. */
167 memset(dparam, 0xff, sizeof(*dparam));
168 dparam_ops->write_to_flash(dparam);
169 }
170 } else if (dparam_ops->read_from_flash(dparam)) {
171 printk(BIOS_INFO, "DRAM-K: Fast Calibration\n");
172 if (dram_run_fast_calibration(dparam, config) == 0) {
173 printk(BIOS_INFO,
174 "Calibration params loaded from flash\n");
175 if (mt_set_emi(dparam) == 0 && mt_mem_test() == 0)
176 return;
177 } else {
178 printk(BIOS_ERR,
179 "Failed to apply cached calibration data\n");
180 }
181 } else {
182 printk(BIOS_WARNING,
183 "Failed to read calibration data from flash\n");
184 }
185
186 const struct sdram_params *sdram_cfg = get_sdram_config();
187
188 /* Run full calibration */
189 printk(BIOS_INFO, "DRAM-K: Full Calibration\n");
190 int err = dram_run_full_calibration(dparam, sdram_cfg->ddr_geometry, config);
191 if (err == 0) {
192 printk(BIOS_INFO, "Successfully loaded DRAM blobs and "
193 "ran DRAM calibration\n");
194
195 /*
196 * In recovery mode the system boots in RO but the flash params
197 * should be calibrated for RW so we can't mix them up.
198 */
199 if (!recovery_mode) {
200 set_source_to_flash(dparam->freq_params);
201 dparam->header.checksum = compute_checksum(dparam);
202 dparam_ops->write_to_flash(dparam);
203 printk(BIOS_DEBUG, "Calibration params saved to flash: "
204 "version=%#x, size=%#x\n",
205 dparam->header.version, dparam->header.size);
206 }
207 return;
208 }
209
210 printk(BIOS_ERR, "Failed to do full calibration (%d), "
211 "falling back to load default sdram param\n", err);
212
213 /* Init params from sdram configs and run partial calibration */
214 printk(BIOS_INFO, "DRAM-K: Partial Calibration\n");
215 init_sdram_params(dparam->freq_params, sdram_cfg);
216 if (mt_set_emi(dparam) != 0)
217 die("Set emi failed with params from sdram config\n");
218 if (mt_mem_test() != 0)
219 die("Memory test failed with params from sdram config\n");
220 }
221
mt_mem_init(struct dramc_param_ops * dparam_ops)222 void mt_mem_init(struct dramc_param_ops *dparam_ops)
223 {
224 mt_mem_init_run(dparam_ops);
225
226 /* After DRAM calibration, restore vcore voltage to default setting */
227 pmic_set_vcore_vol(800000);
228 }
229