1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#include <memlayout.h> 4 5#include <arch/header.ld> 6 7/* Note: The BootROM will jump to 0xFF704004 after loading bootblock, 8 * so the bootblock loading address must be at 0xFF704004. 9 */ 10SECTIONS 11{ 12 DRAM_START(0x00000000) 13 RAMSTAGE(0x00200000, 2M) 14 POSTRAM_CBFS_CACHE(0x01000000, 1M) 15 DMA_COHERENT(0x10000000, 2M) 16 FRAMEBUFFER(0x10800000, 8M) 17 18 SRAM_START(0xFF700000) 19 TTB(0xFF700000, 16K) 20 BOOTBLOCK(0xFF704004, 15K - 4) 21 PRERAM_CBMEM_CONSOLE(0xFF707C00, 1K) 22 VBOOT2_WORK(0xFF708000, 12K) 23 OVERLAP_VERSTAGE_ROMSTAGE(0xFF70B000, 49K) 24 TIMESTAMP(0xFF717400, 0x180) 25 PRERAM_CBFS_CACHE(0xFF717580, 0x100) 26 STACK(0xFF717680, 3K - 0x280) 27 SRAM_END(0xFF718000) 28 29 /* 4K of special SRAM in PMU power domain. 30 * Careful: only supports 32-bit wide write accesses! */ 31 REGION_START(pmu_sram, 0xFF720000) 32 TTB_SUBTABLES(0xFF720800, 1K) 33 WATCHDOG_TOMBSTONE(0xFF720FFC, 4) 34 REGION_END(pmu_sram, 0xFF721000) 35} 36