1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #define __SIMPLE_DEVICE__
4
5 #include "imc.h"
6 #include <amdblocks/acpimmio.h>
7 #include <device/mmio.h>
8 #include <device/pci_ops.h>
9 #include <device/device.h>
10 #include <Porting.h>
11 #include <AGESA.h>
12 #include <Lib/amdlib.h>
13 #include <Proc/Fch/Common/FchCommonCfg.h>
14 #include <Proc/Fch/Fch.h>
15 #include <Proc/Fch/FchPlatform.h>
16
imc_reg_init(void)17 void imc_reg_init(void)
18 {
19 u8 reg8;
20 /* Init Power Management Block 2 (PM2) Registers.
21 * Check BKDG for AMD Family 16h for details. */
22 pm2_write8(0, 0x06);
23 pm2_write8(1, 0x06);
24 pm2_write8(2, 0xf7);
25 pm2_write8(3, 0xff);
26 pm2_write8(4, 0xff);
27
28 pm2_write8(0x10, 0x06);
29 pm2_write8(0x11, 0x06);
30 pm2_write8(0x12, 0xf7);
31 pm2_write8(0x13, 0xff);
32 pm2_write8(0x14, 0xff);
33
34 reg8 = pci_read_config8(PCI_DEV(0, 0x18, 0x3), 0x1E4);
35 reg8 &= 0x8F;
36 reg8 |= 0x10;
37 pci_write_config8(PCI_DEV(0, 0x18, 0x3), 0x1E4, reg8);
38 }
39
enable_imc_thermal_zone(void)40 void enable_imc_thermal_zone(void)
41 {
42 AMD_CONFIG_PARAMS StdHeader;
43 UINT8 FunNum;
44 UINT8 regs[10];
45 int i;
46
47 regs[0] = 0;
48 regs[1] = 0;
49 FunNum = Fun_80;
50 for (i = 0; i <= 1; i++)
51 WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
52 WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader);
53 WaitForEcLDN9MailboxCmdAck(&StdHeader);
54
55 for (i = 2; i < ARRAY_SIZE(regs); i++)
56 ReadECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
57
58 /* enable thermal zone 0 */
59 regs[2] |= 1;
60 regs[0] = 0;
61 regs[1] = 0;
62 FunNum = Fun_81;
63 for (i = 0; i < ARRAY_SIZE(regs); i++)
64 WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
65 WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader);
66 WaitForEcLDN9MailboxCmdAck(&StdHeader);
67 }
68