1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 // Use simple device model for this file even in ramstage 4 #define __SIMPLE_DEVICE__ 5 6 #include <device/pci_ops.h> 7 #include <cf9_reset.h> 8 #include <reset.h> 9 10 #define HT_INIT_CONTROL 0x6c 11 #define HTIC_ColdR_Detect (1 << 4) 12 #define HTIC_BIOSR_Detect (1 << 5) 13 #define HTIC_INIT_Detect (1 << 6) 14 cf9_reset_prepare(void)15void cf9_reset_prepare(void) 16 { 17 u32 htic; 18 htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); 19 htic &= ~HTIC_BIOSR_Detect; 20 pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); 21 } 22 do_board_reset(void)23void do_board_reset(void) 24 { 25 system_reset(); 26 } 27