1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#include <arch/hpet.h> 4 5// Intel LPC Bus Device - 0:1f.0 6 7Device (LPCB) 8{ 9 Name(_ADR, 0x001f0000) 10 11 OperationRegion(LPC0, PCI_Config, 0x00, 0x100) 12 Field (LPC0, AnyAcc, NoLock, Preserve) 13 { 14 Offset (0x40), 15 PMBS, 16, // PMBASE 16 Offset (0x60), // Interrupt Routing Registers 17 PRTA, 8, 18 PRTB, 8, 19 PRTC, 8, 20 PRTD, 8, 21 Offset (0x68), 22 PRTE, 8, 23 PRTF, 8, 24 PRTG, 8, 25 PRTH, 8, 26 27 Offset (0x80), // IO Decode Ranges 28 IOD0, 8, 29 IOD1, 8, 30 31 Offset (0xb8), // GPIO Routing Control 32 GR00, 2, 33 GR01, 2, 34 GR02, 2, 35 GR03, 2, 36 GR04, 2, 37 GR05, 2, 38 GR06, 2, 39 GR07, 2, 40 GR08, 2, 41 GR09, 2, 42 GR10, 2, 43 GR11, 2, 44 GR12, 2, 45 GR13, 2, 46 GR14, 2, 47 GR15, 2, 48 } 49 50 #include <southbridge/intel/common/acpi/irqlinks.asl> 51 52 #include "acpi/ec.asl" 53 54 Device (DMAC) // DMA Controller 55 { 56 Name(_HID, EISAID("PNP0200")) 57 Name(_CRS, ResourceTemplate() 58 { 59 IO (Decode16, 0x00, 0x00, 0x01, 0x20) 60 IO (Decode16, 0x81, 0x81, 0x01, 0x11) 61 IO (Decode16, 0x93, 0x93, 0x01, 0x0d) 62 IO (Decode16, 0xc0, 0xc0, 0x01, 0x20) 63 DMA (Compatibility, NotBusMaster, Transfer8_16) { 4 } 64 }) 65 } 66 67 Device (FWH) // Firmware Hub 68 { 69 Name (_HID, EISAID("INT0800")) 70 Name (_CRS, ResourceTemplate() 71 { 72 Memory32Fixed(ReadOnly, 0xff000000, 0x01000000) 73 }) 74 } 75 76 Device (HPET) 77 { 78 Name (_HID, EISAID("PNP0103")) 79 Name (_CID, 0x010CD041) 80 81 Name(BUF0, ResourceTemplate() 82 { 83 Memory32Fixed(ReadOnly, HPET_BASE_ADDRESS, 0x400, FED0) 84 }) 85 86 Method (_STA, 0) // Device Status 87 { 88 Return (\HPTS(HPTE)) 89 } 90 91 Method (_CRS, 0, Serialized) // Current resources 92 { 93 If (HPTE) { 94 CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) 95 If (HPAS == 1) { 96 HPT0 = HPET_BASE_ADDRESS + 0x1000 97 } 98 99 If (HPAS == 2) { 100 HPT0 = HPET_BASE_ADDRESS + 0x2000 101 } 102 103 If (HPAS == 3) { 104 HPT0 = HPET_BASE_ADDRESS + 0x3000 105 } 106 } 107 108 Return (BUF0) 109 } 110 } 111 112 Device(PIC) // 8259 Interrupt Controller 113 { 114 Name(_HID,EISAID("PNP0000")) 115 Name(_CRS, ResourceTemplate() 116 { 117 IO (Decode16, 0x20, 0x20, 0x01, 0x02) 118 IO (Decode16, 0x24, 0x24, 0x01, 0x02) 119 IO (Decode16, 0x28, 0x28, 0x01, 0x02) 120 IO (Decode16, 0x2c, 0x2c, 0x01, 0x02) 121 IO (Decode16, 0x30, 0x30, 0x01, 0x02) 122 IO (Decode16, 0x34, 0x34, 0x01, 0x02) 123 IO (Decode16, 0x38, 0x38, 0x01, 0x02) 124 IO (Decode16, 0x3c, 0x3c, 0x01, 0x02) 125 IO (Decode16, 0xa0, 0xa0, 0x01, 0x02) 126 IO (Decode16, 0xa4, 0xa4, 0x01, 0x02) 127 IO (Decode16, 0xa8, 0xa8, 0x01, 0x02) 128 IO (Decode16, 0xac, 0xac, 0x01, 0x02) 129 IO (Decode16, 0xb0, 0xb0, 0x01, 0x02) 130 IO (Decode16, 0xb4, 0xb4, 0x01, 0x02) 131 IO (Decode16, 0xb8, 0xb8, 0x01, 0x02) 132 IO (Decode16, 0xbc, 0xbc, 0x01, 0x02) 133 IO (Decode16, 0x4d0, 0x4d0, 0x01, 0x02) 134 IRQNoFlags () { 2 } 135 }) 136 } 137 138 Device(MATH) // FPU 139 { 140 Name (_HID, EISAID("PNP0C04")) 141 Name (_CRS, ResourceTemplate() 142 { 143 IO (Decode16, 0xf0, 0xf0, 0x01, 0x01) 144 IRQNoFlags() { 13 } 145 }) 146 } 147 148 Device(LDRC) // LPC device: Resource consumption 149 { 150 Name (_HID, EISAID("PNP0C02")) 151 Name (_UID, 2) 152 Name (_CRS, ResourceTemplate() 153 { 154 IO (Decode16, 0x2e, 0x2e, 0x1, 0x02) // First SuperIO 155 IO (Decode16, 0x4e, 0x4e, 0x1, 0x02) // Second SuperIO 156 IO (Decode16, 0x61, 0x61, 0x1, 0x01) // NMI Status 157 IO (Decode16, 0x63, 0x63, 0x1, 0x01) // CPU Reserved 158 IO (Decode16, 0x65, 0x65, 0x1, 0x01) // CPU Reserved 159 IO (Decode16, 0x67, 0x67, 0x1, 0x01) // CPU Reserved 160 IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post 161 IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved 162 IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI 163 IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH7-M ACPI 164 IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH7-M GPIO 165 }) 166 } 167 168 Device (RTC) // Real Time Clock 169 { 170 Name (_HID, EISAID("PNP0B00")) 171 Name (_CRS, ResourceTemplate() 172 { 173 IO (Decode16, 0x70, 0x70, 1, 8) 174 }) 175 } 176 177 Device (TIMR) // Intel 8254 timer 178 { 179 Name(_HID, EISAID("PNP0100")) 180 Name(_CRS, ResourceTemplate() 181 { 182 IO (Decode16, 0x40, 0x40, 0x01, 0x04) 183 IO (Decode16, 0x50, 0x50, 0x10, 0x04) 184 IRQNoFlags() {0} 185 }) 186 } 187 188 #include "acpi/superio.asl" 189} 190