1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ_H 4 #define SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ_H 5 6 #include <device/device.h> 7 8 /* 9 * The DnnIR registers use common RCBA offsets across these chipsets: 10 * bd82x6x, i82801, i89xx, ibexpeak, lynxpoint 11 * 12 * However not all registers are in use on all of these. 13 */ 14 15 #define D31IR 0x3140 /* 16bit */ 16 #define D30IR 0x3142 /* 16bit */ 17 #define D29IR 0x3144 /* 16bit */ 18 #define D28IR 0x3146 /* 16bit */ 19 #define D27IR 0x3148 /* 16bit */ 20 #define D26IR 0x314c /* 16bit */ 21 #define D25IR 0x3150 /* 16bit */ 22 #define D23IR 0x3158 /* 16bit */ 23 #define D22IR 0x315c /* 16bit */ 24 #define D21IR 0x3164 /* 16bit */ 25 #define D20IR 0x3160 /* 16bit */ 26 #define D19IR 0x3168 /* 16bit */ 27 28 /* Generate an ACPI _PRT table for chipsets that use PIRQs exclusively */ 29 void intel_acpi_gen_def_acpi_pirq(const struct device *dev); 30 31 #endif /* SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ_H */ 32