1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* Intel ICH USB support */ 4 5// USB Controller 0:1d.0 6 7Device (USB1) 8{ 9 Name(_ADR, 0x001d0000) 10 11 OperationRegion(U01P, PCI_Config, 0, 256) 12 Field(U01P, DWordAcc, NoLock, Preserve) 13 { 14 Offset(0xc4), 15 U1WE, 2 // USB Wake Enable 16 } 17 18 Name (_PRW, Package(){ 3, 4 }) // Power Resources for Wake 19 20 Method (_PSW, 1) // Power State Wake method 21 { 22 // USB Controller can wake OS from Sleep State 23 If (Arg0) { 24 U1WE = 3 25 } Else { 26 U1WE = 0 27 } 28 } 29 30 // Leave USB ports on for to allow Wake from USB 31 32 Method(_S3D,0) // Highest D State in S3 State 33 { 34 Return (2) 35 } 36 37 Method(_S4D,0) // Highest D State in S4 State 38 { 39 Return (2) 40 } 41} 42 43 44// USB Controller 0:1d.1 45 46Device (USB2) 47{ 48 Name(_ADR, 0x001d0001) 49 50 OperationRegion(U02P, PCI_Config, 0, 256) 51 Field(U02P, DWordAcc, NoLock, Preserve) 52 { 53 Offset(0xc4), 54 U2WE, 2 // USB Wake Enable 55 } 56 57 Name (_PRW, Package(){ 3, 4 }) // Power Resources for Wake 58 59 Method (_PSW, 1) // Power State Wake method 60 { 61 // USB Controller can wake OS from Sleep State 62 If (Arg0) { 63 U2WE = 3 64 } Else { 65 U2WE = 0 66 } 67 } 68 69 // Leave USB ports on for to allow Wake from USB 70 71 Method(_S3D,0) // Highest D State in S3 State 72 { 73 Return (2) 74 } 75 76 Method(_S4D,0) // Highest D State in S4 State 77 { 78 Return (2) 79 } 80 81} 82 83 84// USB Controller 0:1d.2 85 86Device (USB3) 87{ 88 Name(_ADR, 0x001d0002) 89 90 OperationRegion(U03P, PCI_Config, 0, 256) 91 Field(U03P, DWordAcc, NoLock, Preserve) 92 { 93 Offset(0xc4), 94 U3WE, 2 // USB Wake Enable 95 } 96 97 Name (_PRW, Package(){ 3, 4 }) // Power Resources for Wake 98 99 Method (_PSW, 1) // Power State Wake method 100 { 101 // USB Controller can wake OS from Sleep State 102 If (Arg0) { 103 U3WE = 3 104 } Else { 105 U3WE = 0 106 } 107 } 108 109 // Leave USB ports on for to allow Wake from USB 110 111 Method(_S3D,0) // Highest D State in S3 State 112 { 113 Return (2) 114 } 115 116 Method(_S4D,0) // Highest D State in S4 State 117 { 118 Return (2) 119 } 120 121} 122 123 124// EHCI Controller 0:1d.7 125 126Device (EHC1) 127{ 128 Name(_ADR, 0x001d0007) 129 130 Name (_PRW, Package(){ 13, 4 }) // Power Resources for Wake 131 132 // Leave USB ports on for to allow Wake from USB 133 134 Method(_S3D,0) // Highest D State in S3 State 135 { 136 Return (2) 137 } 138 139 Method(_S4D,0) // Highest D State in S4 State 140 { 141 Return (2) 142 } 143 144 Device (HUB7) 145 { 146 Name (_ADR, 0x00000000) 147 148 // How many are there? 149 Device (PRT1) { Name (_ADR, 1) } // USB Port 0 150 Device (PRT2) { Name (_ADR, 2) } // USB Port 1 151 Device (PRT3) { Name (_ADR, 3) } // USB Port 2 152 Device (PRT4) { Name (_ADR, 4) } // USB Port 3 153 Device (PRT5) { Name (_ADR, 5) } // USB Port 4 154 Device (PRT6) { Name (_ADR, 6) } // USB Port 5 155 } 156} 157 158 159// USB Controller 0:1a.0 160 161Device (USB4) 162{ 163 Name(_ADR, 0x001a0000) 164 165 OperationRegion(U01P, PCI_Config, 0, 256) 166 Field(U01P, DWordAcc, NoLock, Preserve) 167 { 168 Offset(0xc4), 169 U1WE, 2 // USB Wake Enable 170 } 171 172 Name (_PRW, Package(){ 3, 4 }) // Power Resources for Wake 173 174 Method (_PSW, 1) // Power State Wake method 175 { 176 // USB Controller can wake OS from Sleep State 177 If (Arg0) { 178 U1WE = 3 179 } Else { 180 U1WE = 0 181 } 182 } 183 184 // Leave USB ports on for to allow Wake from USB 185 186 Method(_S3D,0) // Highest D State in S3 State 187 { 188 Return (2) 189 } 190 191 Method(_S4D,0) // Highest D State in S4 State 192 { 193 Return (2) 194 } 195} 196 197 198// USB Controller 0:1a.1 199 200Device (USB5) 201{ 202 Name(_ADR, 0x001a0001) 203 204 OperationRegion(U02P, PCI_Config, 0, 256) 205 Field(U02P, DWordAcc, NoLock, Preserve) 206 { 207 Offset(0xc4), 208 U2WE, 2 // USB Wake Enable 209 } 210 211 Name (_PRW, Package(){ 3, 4 }) // Power Resources for Wake 212 213 Method (_PSW, 1) // Power State Wake method 214 { 215 // USB Controller can wake OS from Sleep State 216 If (Arg0) { 217 U2WE = 3 218 } Else { 219 U2WE = 0 220 } 221 } 222 223 // Leave USB ports on for to allow Wake from USB 224 225 Method(_S3D,0) // Highest D State in S3 State 226 { 227 Return (2) 228 } 229 230 Method(_S4D,0) // Highest D State in S4 State 231 { 232 Return (2) 233 } 234 235} 236 237 238// USB Controller 0:1a.2 239 240Device (USB6) 241{ 242 Name(_ADR, 0x001a0002) 243 244 OperationRegion(U03P, PCI_Config, 0, 256) 245 Field(U03P, DWordAcc, NoLock, Preserve) 246 { 247 Offset(0xc4), 248 U3WE, 2 // USB Wake Enable 249 } 250 251 Name (_PRW, Package(){ 3, 4 }) // Power Resources for Wake 252 253 Method (_PSW, 1) // Power State Wake method 254 { 255 // USB Controller can wake OS from Sleep State 256 If (Arg0) { 257 U3WE = 3 258 } Else { 259 U3WE = 0 260 } 261 } 262 263 // Leave USB ports on for to allow Wake from USB 264 265 Method(_S3D,0) // Highest D State in S3 State 266 { 267 Return (2) 268 } 269 270 Method(_S4D,0) // Highest D State in S4 State 271 { 272 Return (2) 273 } 274 275} 276 277 278// EHCI Controller 0:1a.7 279 280Device (EHC2) 281{ 282 Name(_ADR, 0x001a0007) 283 284 Name (_PRW, Package(){ 13, 4 }) // Power Resources for Wake 285 286 // Leave USB ports on for to allow Wake from USB 287 288 Method(_S3D,0) // Highest D State in S3 State 289 { 290 Return (2) 291 } 292 293 Method(_S4D,0) // Highest D State in S4 State 294 { 295 Return (2) 296 } 297 298 Device (HUB7) 299 { 300 Name (_ADR, 0x00000000) 301 302 // How many are there? 303 Device (PRT1) { Name (_ADR, 1) } // USB Port 0 304 Device (PRT2) { Name (_ADR, 2) } // USB Port 1 305 Device (PRT3) { Name (_ADR, 3) } // USB Port 2 306 Device (PRT4) { Name (_ADR, 4) } // USB Port 3 307 Device (PRT5) { Name (_ADR, 5) } // USB Port 4 308 Device (PRT6) { Name (_ADR, 6) } // USB Port 5 309 } 310} 311