1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* =================== Generic PnP Device =================== */ 4 5/* 6 * Generic setup for PnP devices. 7 * 8 * Controlled by the following preprocessor defines: 9 * 10 * SUPERIO_CHIP_NAME The name of the Super I/O chip (unique, required) 11 * SUPERIO_PNP_HID The EisaId string that identifies this device (optional) 12 * SUPERIO_PNP_LDN The logical device number on the Super I/O 13 * chip for this device (required) 14 * SUPERIO_PNP_DDN A string literal that identifies the dos device 15 * name (DDN) of this device (e.g. "COM1", optional) 16 * SUPERIO_PNP_NO_DIS If defined, the PNP device has no Enable/Disable methods 17 * SUPERIO_PNP_PM_REG Identifier of a 1-bit register to power down 18 * the logical device (optional) 19 * SUPERIO_PNP_PM_VAL The value for SUPERIO_PNP_PM_REG to power the logical 20 * device down (required if SUPERIO_PNP_PM_REG is defined) 21 * SUPERIO_PNP_PM_LDN The logical device number to access the PM_REG 22 * bit (required if SUPERIO_PNP_PM_REG is defined) 23 * SUPERIO_PNP_IO0 The alignment and length of the first PnP i/o 24 * resource (comma separated, e.g. `0x02, 0x08`, 25 * optional) 26 * SUPERIO_PNP_IO1 The alignment and length of the second PnP i/o 27 * resource (comma separated, e.g. `0x02, 0x08`, 28 * optional) 29 * SUPERIO_PNP_IO2 The alignment and length of the third PnP i/o 30 * resource (comma separated, e.g. `0x02, 0x08`, 31 * optional) 32 * SUPERIO_PNP_IRQ0 If defined, the first PnP IRQ register is enabled 33 * SUPERIO_PNP_IRQ1 If defined, the second PnP IRQ register is enabled 34 * SUPERIO_PNP_DMA If defined, the PnP DMA register is enabled 35 */ 36 37#include "pnp.asl" 38 39#ifndef SUPERIO_CHIP_NAME 40# error "SUPERIO_CHIP_NAME is not defined." 41#endif 42 43#ifndef SUPERIO_PNP_LDN 44# error "SUPERIO_PNP_LDN is not defined." 45#endif 46 47Device (SUPERIO_ID(PN, SUPERIO_PNP_LDN)) { 48 #ifdef SUPERIO_PNP_HID 49 Name (_HID, EisaId (SUPERIO_PNP_HID)) 50 #else 51 Name (_HID, EisaId ("PNP0c02")) /* TODO: Better fitting EisaId? */ 52 #endif 53 Name (_UID, SUPERIO_UID(PN, SUPERIO_PNP_LDN)) 54 #ifdef SUPERIO_PNP_DDN 55 Name (_DDN, SUPERIO_PNP_DDN) 56 #endif 57 58 59#ifdef SUPERIO_PNP_NO_DIS 60 Method (_STA) 61 { 62 Return (DEVICE_PRESENT_ACTIVE) 63 } 64#else 65 Method (_STA) 66 { 67 PNP_GENERIC_STA(SUPERIO_PNP_LDN) 68 } 69 70 Method (_DIS) 71 { 72 PNP_GENERIC_DIS(SUPERIO_PNP_LDN) 73 } 74#endif 75 76#ifdef SUPERIO_PNP_PM_REG 77 Method (_PSC) { 78 PNP_GENERIC_PSC(SUPERIO_PNP_PM_REG, SUPERIO_PNP_PM_VAL, SUPERIO_PNP_PM_LDN) 79 } 80 81 Method (_PS0) { 82 PNP_GENERIC_PS0(SUPERIO_PNP_PM_REG, SUPERIO_PNP_PM_VAL, SUPERIO_PNP_PM_LDN) 83 } 84 85 Method (_PS3) { 86 PNP_GENERIC_PS3(SUPERIO_PNP_PM_REG, SUPERIO_PNP_PM_VAL, SUPERIO_PNP_PM_LDN) 87 } 88#else 89 Method (_PSC) { 90 PNP_DEFAULT_PSC 91 } 92#endif 93 94 Method (_CRS, 0, Serialized) 95 { 96 Name (CRS, ResourceTemplate () { 97#ifdef SUPERIO_PNP_IO0 98 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO0, IO0) 99#endif 100#ifdef SUPERIO_PNP_IO1 101 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO1, IO1) 102#endif 103#ifdef SUPERIO_PNP_IO2 104 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO2, IO2) 105#endif 106#ifdef SUPERIO_PNP_IRQ0 107 IRQNoFlags (IR0) {} 108#endif 109#ifdef SUPERIO_PNP_IRQ1 110 IRQNoFlags (IR1) {} 111#endif 112#ifdef SUPERIO_PNP_DMA 113 DMA (Compatibility, NotBusMaster, Transfer8, DM0) {} 114#endif 115 }) 116 ENTER_CONFIG_MODE (SUPERIO_PNP_LDN) 117#ifdef SUPERIO_PNP_IO0 118 PNP_READ_IO(PNP_IO0, CRS, IO0) 119#endif 120#ifdef SUPERIO_PNP_IO1 121 PNP_READ_IO(PNP_IO1, CRS, IO1) 122#endif 123#ifdef SUPERIO_PNP_IO2 124 PNP_READ_IO(PNP_IO2, CRS, IO2) 125#endif 126#ifdef SUPERIO_PNP_IRQ0 127 PNP_READ_IRQ(PNP_IRQ0, CRS, IR0) 128#endif 129#ifdef SUPERIO_PNP_IRQ1 130 PNP_READ_IRQ(PNP_IRQ1, CRS, IR1) 131#endif 132#ifdef SUPERIO_PNP_DMA 133 PNP_READ_DMA(PNP_DMA0, CRS, DM0) 134#endif 135 EXIT_CONFIG_MODE () 136 Return (CRS) 137 } 138 139 Method (_SRS, 1, Serialized) 140 { 141 Name (TMPL, ResourceTemplate () { 142#ifdef SUPERIO_PNP_IO0 143 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO0, IO0) 144#endif 145#ifdef SUPERIO_PNP_IO1 146 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO1, IO1) 147#endif 148#ifdef SUPERIO_PNP_IO2 149 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO2, IO2) 150#endif 151#ifdef SUPERIO_PNP_IRQ0 152 IRQNoFlags (IR0) {} 153#endif 154#ifdef SUPERIO_PNP_IRQ1 155 IRQNoFlags (IR1) {} 156#endif 157#ifdef SUPERIO_PNP_DMA 158 DMA (Compatibility, NotBusMaster, Transfer8, DM0) {} 159#endif 160 }) 161 ENTER_CONFIG_MODE (SUPERIO_PNP_LDN) 162#ifdef SUPERIO_PNP_IO0 163 PNP_WRITE_IO(PNP_IO0, Arg0, IO0) 164#endif 165#ifdef SUPERIO_PNP_IO1 166 PNP_WRITE_IO(PNP_IO1, Arg0, IO1) 167#endif 168#ifdef SUPERIO_PNP_IO2 169 PNP_WRITE_IO(PNP_IO2, Arg0, IO2) 170#endif 171#ifdef SUPERIO_PNP_IRQ0 172 PNP_WRITE_IRQ(PNP_IRQ0, Arg0, IR0) 173#endif 174#ifdef SUPERIO_PNP_IRQ1 175 PNP_WRITE_IRQ(PNP_IRQ1, Arg0, IR1) 176#endif 177#ifdef SUPERIO_PNP_DMA 178 PNP_WRITE_DMA(PNP_DMA0, Arg0, DM0) 179#endif 180 PNP_DEVICE_ACTIVE = 1 181 EXIT_CONFIG_MODE () 182 } 183 184 /* This is used for _SRS. Since _DIS only disables the device 185 * without changing the resources this works. 186 */ 187 Method (_PRS, 0) 188 { 189 return (_CRS) 190 } 191} 192