1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* 4 * Include this file into a mainboard's DSDT _SB device tree and it will 5 * expose the IT8784E SuperIO and some of its functionality. 6 * 7 * It allows the change of IO ports, IRQs and DMA settings on logical 8 * devices, disabling and reenabling logical devices. 9 * 10 * LDN State 11 * 0x1 UARTA Implemented, untested 12 * 0x2 UARTB Implemented, untested 13 * 0x3 PP Not implemented 14 * 0x4 EC Implemented, untested 15 * 0x5 KBC Implemented, untested 16 * 0x6 MOUSE Implemented, untested 17 * 0x7 GPIO Not implemented 18 * 0xa CIR Not implemented 19 * 20 * Controllable through preprocessor defines: 21 * SUPERIO_DEV Device identifier for this SIO (e.g. SIO0) 22 * SUPERIO_PNP_BASE I/O address of the first PnP configuration register 23 * IT8784E_SHOW_UARTA If defined, UARTA will be exposed. 24 * IT8784E_SHOW_UARTB If defined, UARTB will be exposed. 25 * IT8784E_SHOW_KBC If defined, the KBC will be exposed. 26 * IT8784E_SHOW_PS2M If defined, PS/2 mouse support will be exposed. 27 * IT8784E_SHOW_EC If defined, EC will be exposed. 28 */ 29 30#undef SUPERIO_CHIP_NAME 31#define SUPERIO_CHIP_NAME IT8784E 32#include <superio/acpi/pnp.asl> 33 34#undef PNP_DEFAULT_PSC 35#define PNP_DEFAULT_PSC Return (0) /* no power management */ 36 37#define CONFIGURE_CONTROL CCTL 38 39Device (SUPERIO_DEV) { 40 Name (_HID, EisaId("PNP0A05")) 41 Name (_STR, Unicode("ITE IT8784E Super I/O")) 42 Name (_UID, SUPERIO_UID(SUPERIO_DEV,)) 43 44 /* Mutex for accesses to the configuration ports */ 45 Mutex (CRMX, 1) 46 47 /* SuperIO configuration ports */ 48 OperationRegion (CREG, SystemIO, SUPERIO_PNP_BASE, 0x02) 49 Field (CREG, ByteAcc, NoLock, Preserve) 50 { 51 PNP_ADDR_REG, 8, 52 PNP_DATA_REG, 8 53 } 54 IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve) 55 { 56 Offset (0x02), 57 CONFIGURE_CONTROL, 8, /* Global configure control */ 58 59 Offset (0x07), 60 PNP_LOGICAL_DEVICE, 8, /* Logical device selector */ 61 62 Offset (0x30), 63 PNP_DEVICE_ACTIVE, 1, /* Logical device activation */ 64 65 Offset (0x60), 66 PNP_IO0_HIGH_BYTE, 8, /* First I/O port base - high byte */ 67 PNP_IO0_LOW_BYTE, 8, /* First I/O port base - low byte */ 68 Offset (0x62), 69 PNP_IO1_HIGH_BYTE, 8, /* Second I/O port base - high byte */ 70 PNP_IO1_LOW_BYTE, 8, /* Second I/O port base - low byte */ 71 72 Offset (0x70), 73 PNP_IRQ0, 8, /* First IRQ */ 74 } 75 76 Method (_CRS) 77 { 78 /* Announce the used i/o ports to the OS */ 79 Return (ResourceTemplate () { 80 IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02) 81 }) 82 } 83 84 #undef PNP_ENTER_MAGIC_1ST 85 #undef PNP_ENTER_MAGIC_2ND 86 #undef PNP_ENTER_MAGIC_3RD 87 #undef PNP_ENTER_MAGIC_4TH 88 #undef PNP_EXIT_MAGIC_1ST 89 #define PNP_ENTER_MAGIC_1ST 0x87 90 #define PNP_ENTER_MAGIC_2ND 0x01 91 #define PNP_ENTER_MAGIC_3RD 0x55 92#if SUPERIO_PNP_BASE == 0x2e 93 #define PNP_ENTER_MAGIC_4TH 0x55 94#else 95 #define PNP_ENTER_MAGIC_4TH 0xaa 96#endif 97 #define PNP_EXIT_SPECIAL_REG CONFIGURE_CONTROL 98 #define PNP_EXIT_SPECIAL_VAL 0x02 99 #include <superio/acpi/pnp_config.asl> 100 101#ifdef IT8784E_SHOW_UARTA 102 #undef SUPERIO_UART_LDN 103 #undef SUPERIO_UART_DDN 104 #undef SUPERIO_UART_PM_REG 105 #undef SUPERIO_UART_PM_VAL 106 #undef SUPERIO_UART_PM_LDN 107 #define SUPERIO_UART_LDN 1 108 #include <superio/acpi/pnp_uart.asl> 109#endif 110 111#ifdef IT8784E_SHOW_UARTB 112 #undef SUPERIO_UART_LDN 113 #undef SUPERIO_UART_DDN 114 #undef SUPERIO_UART_PM_REG 115 #undef SUPERIO_UART_PM_VAL 116 #undef SUPERIO_UART_PM_LDN 117 #define SUPERIO_UART_LDN 2 118 #include <superio/acpi/pnp_uart.asl> 119#endif 120 121#ifdef IT8784E_SHOW_EC 122 #undef SUPERIO_PNP_HID 123 #undef SUPERIO_PNP_LDN 124 #undef SUPERIO_PNP_DDN 125 #undef SUPERIO_PNP_NO_DIS 126 #undef SUPERIO_PNP_PM_REG 127 #undef SUPERIO_PNP_PM_VAL 128 #undef SUPERIO_PNP_PM_LDN 129 #undef SUPERIO_PNP_IO0 130 #undef SUPERIO_PNP_IO1 131 #undef SUPERIO_PNP_IO2 132 #undef SUPERIO_PNP_IRQ0 133 #undef SUPERIO_PNP_IRQ1 134 #undef SUPERIO_PNP_DMA 135 #define SUPERIO_PNP_LDN 4 136 #define SUPERIO_PNP_IO0 0x08, 0x08 137 #define SUPERIO_PNP_IO1 0x08, 0x04 138 #define SUPERIO_PNP_IRQ0 139 #include <superio/acpi/pnp_generic.asl> 140#endif 141 142#ifdef IT8784E_SHOW_KBC 143 #undef SUPERIO_KBC_LDN 144 #undef SUPERIO_KBC_PS2M 145 #undef SUPERIO_KBC_PS2LDN 146 #define SUPERIO_KBC_LDN 5 147#ifdef IT8784E_SHOW_PS2M 148 #define SUPERIO_KBC_PS2LDN 6 149#endif 150 #include <superio/acpi/pnp_kbc.asl> 151#endif 152} 153