1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #define ME_NOT_PRESENT 0 4 #define ME_FOUND_NOTHING 1 5 #define ME_FOUND_SOMETHING_NOT_SURE 2 6 #define ME_CAN_DISABLE_IF_PRESENT 3 7 #define ME_PRESENT_CAN_DISABLE 4 8 #define ME_PRESENT_CANNOT_DISABLE 5 9 10 #define INTELMETOOL_VERSION "1.1" 11 12 #define GPLV2COPYRIGHT \ 13 "This program is free software: you can redistribute it and/or modify\n" \ 14 "it under the terms of the GNU General Public License as published by\n" \ 15 "the Free Software Foundation, version 2 of the License.\n\n" \ 16 "This program is distributed in the hope that it will be useful,\n" \ 17 "but WITHOUT ANY WARRANTY; without even the implied warranty of\n" \ 18 "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" \ 19 "GNU General Public License for more details.\n\n" 20 21 #if defined(__GLIBC__) 22 #include <sys/io.h> 23 #endif 24 #if (defined(__MACH__) && defined(__APPLE__)) 25 /* DirectHW is available here: https://www.coreboot.org/DirectHW */ 26 #define __DARWIN__ 27 #include <DirectHW/DirectHW.h> 28 #endif 29 #ifdef __NetBSD__ 30 #include <pciutils/pci.h> 31 #else 32 #include <pci/pci.h> 33 #endif 34 35 #define CNRM "\x1B[0m" 36 #define CRED "\x1B[31m" 37 #define CGRN "\x1B[32m" 38 #define CYEL "\x1B[33m" 39 #define CBLU "\x1B[34m" 40 #define CMAG "\x1B[35m" 41 #define CCYN "\x1B[36m" 42 #define CWHT "\x1B[37m" 43 #define RESET "\033[0m" 44 45 #define CPU_ID_SIZE 13 46 #define FD2 0x3428 47 #define ME_COMMAND_DELAY 10000 48 #define ME_MESSAGE_LEN 256 49 50 extern int debug; 51 52 #define PCI_VENDOR_ID_INTEL 0x8086 53 54 // Chipset does not have ME 55 #define PCI_DEVICE_ID_INTEL_82810 0x7120 56 #define PCI_DEVICE_ID_INTEL_82810_DC 0x7122 57 #define PCI_DEVICE_ID_INTEL_82810E_DC 0x7124 58 #define PCI_DEVICE_ID_INTEL_82830M 0x3575 59 #define PCI_DEVICE_ID_INTEL_82845 0x1a30 60 #define PCI_DEVICE_ID_INTEL_82865 0x2570 61 #define PCI_DEVICE_ID_INTEL_82915 0x2580 62 #define PCI_DEVICE_ID_INTEL_82945P 0x2770 63 #define PCI_DEVICE_ID_INTEL_82945GM 0x27a0 64 #define PCI_DEVICE_ID_INTEL_82945GSE 0x27ac 65 #define PCI_DEVICE_ID_INTEL_82X58 0x3405 66 #define PCI_DEVICE_ID_INTEL_ATOM_DXXX 0xa000 67 #define PCI_DEVICE_ID_INTEL_I63XX 0x2670 68 #define PCI_DEVICE_ID_INTEL_I5000X 0x25c0 69 #define PCI_DEVICE_ID_INTEL_I5000Z 0x25d0 70 #define PCI_DEVICE_ID_INTEL_I5000V 0x25d4 71 #define PCI_DEVICE_ID_INTEL_I5000P 0x25d8 72 #define PCI_DEVICE_ID_INTEL_82443LX 0x7180 73 #define PCI_DEVICE_ID_INTEL_82443BX 0x7190 74 #define PCI_DEVICE_ID_INTEL_82443BX_NO_AGP 0x7192 75 #define PCI_DEVICE_ID_INTEL_82371XX 0x7110 76 #define PCI_DEVICE_ID_INTEL_ICH 0x2410 77 #define PCI_DEVICE_ID_INTEL_ICH0 0x2420 78 #define PCI_DEVICE_ID_INTEL_ICH2 0x2440 79 #define PCI_DEVICE_ID_INTEL_ICH4 0x24c0 80 #define PCI_DEVICE_ID_INTEL_ICH4M 0x24cc 81 #define PCI_DEVICE_ID_INTEL_ICH5 0x24d0 82 #define PCI_DEVICE_ID_INTEL_ICH6 0x2640 83 #define PCI_DEVICE_ID_INTEL_ICH7DH 0x27b0 84 #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8 85 #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9 86 #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd 87 #define PCI_DEVICE_ID_INTEL_NM10 0x27bc 88 89 #define PCI_DEV_NO_ME(x) ( \ 90 ((x) == PCI_DEVICE_ID_INTEL_82810) || \ 91 ((x) == PCI_DEVICE_ID_INTEL_82810_DC) || \ 92 ((x) == PCI_DEVICE_ID_INTEL_82810E_DC) || \ 93 ((x) == PCI_DEVICE_ID_INTEL_82830M) || \ 94 ((x) == PCI_DEVICE_ID_INTEL_82845) || \ 95 ((x) == PCI_DEVICE_ID_INTEL_82865) || \ 96 ((x) == PCI_DEVICE_ID_INTEL_82915) || \ 97 ((x) == PCI_DEVICE_ID_INTEL_82945P) || \ 98 ((x) == PCI_DEVICE_ID_INTEL_82945GM) || \ 99 ((x) == PCI_DEVICE_ID_INTEL_82945GSE) || \ 100 ((x) == PCI_DEVICE_ID_INTEL_82X58) || \ 101 ((x) == PCI_DEVICE_ID_INTEL_ATOM_DXXX) || \ 102 ((x) == PCI_DEVICE_ID_INTEL_I63XX) || \ 103 ((x) == PCI_DEVICE_ID_INTEL_I5000X) || \ 104 ((x) == PCI_DEVICE_ID_INTEL_I5000Z) || \ 105 ((x) == PCI_DEVICE_ID_INTEL_I5000V) || \ 106 ((x) == PCI_DEVICE_ID_INTEL_I5000P) || \ 107 ((x) == PCI_DEVICE_ID_INTEL_82443LX) || \ 108 ((x) == PCI_DEVICE_ID_INTEL_82443BX) || \ 109 ((x) == PCI_DEVICE_ID_INTEL_82443BX_NO_AGP) || \ 110 ((x) == PCI_DEVICE_ID_INTEL_82371XX) || \ 111 ((x) == PCI_DEVICE_ID_INTEL_ICH) || \ 112 ((x) == PCI_DEVICE_ID_INTEL_ICH0) || \ 113 ((x) == PCI_DEVICE_ID_INTEL_ICH2) || \ 114 ((x) == PCI_DEVICE_ID_INTEL_ICH4) || \ 115 ((x) == PCI_DEVICE_ID_INTEL_ICH4M) || \ 116 ((x) == PCI_DEVICE_ID_INTEL_ICH5) || \ 117 ((x) == PCI_DEVICE_ID_INTEL_ICH6) || \ 118 ((x) == PCI_DEVICE_ID_INTEL_ICH7DH) || \ 119 ((x) == PCI_DEVICE_ID_INTEL_ICH7) || \ 120 ((x) == PCI_DEVICE_ID_INTEL_ICH7M) || \ 121 ((x) == PCI_DEVICE_ID_INTEL_ICH7MDH) || \ 122 ((x) == PCI_DEVICE_ID_INTEL_NM10)) 123 124 // Definitely has ME and can be disabled 125 #define PCI_DEVICE_ID_INTEL_ICH8ME 0x2811 126 #define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917 127 #define PCI_DEVICE_ID_INTEL_ICH9M 0x2919 128 129 #define PCI_DEV_HAS_ME_DISABLE(x) ( \ 130 ((x) == PCI_DEVICE_ID_INTEL_ICH8ME) || \ 131 ((x) == PCI_DEVICE_ID_INTEL_ICH9ME) || \ 132 ((x) == PCI_DEVICE_ID_INTEL_ICH9M)) 133 134 // Definitely has ME and is very difficult to remove 135 #define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16 136 #define PCI_DEVICE_ID_INTEL_3400_DESKTOP 0x3b00 137 #define PCI_DEVICE_ID_INTEL_3400_MOBILE 0x3b01 138 #define PCI_DEVICE_ID_INTEL_P55 0x3b02 139 #define PCI_DEVICE_ID_INTEL_PM55 0x3b03 140 #define PCI_DEVICE_ID_INTEL_H55 0x3b06 141 #define PCI_DEVICE_ID_INTEL_QM57 0x3b07 142 #define PCI_DEVICE_ID_INTEL_H57 0x3b08 143 #define PCI_DEVICE_ID_INTEL_HM55 0x3b09 144 #define PCI_DEVICE_ID_INTEL_Q57 0x3b0a 145 #define PCI_DEVICE_ID_INTEL_HM57 0x3b0b 146 #define PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF 0x3b0d 147 #define PCI_DEVICE_ID_INTEL_B55_A 0x3b0e 148 #define PCI_DEVICE_ID_INTEL_QS57 0x3b0f 149 #define PCI_DEVICE_ID_INTEL_3400 0x3b12 150 #define PCI_DEVICE_ID_INTEL_3420 0x3b14 151 #define PCI_DEVICE_ID_INTEL_3450 0x3b16 152 #define PCI_DEVICE_ID_INTEL_B55_B 0x3b1e 153 #define PCI_DEVICE_ID_INTEL_Z68 0x1c44 154 #define PCI_DEVICE_ID_INTEL_P67 0x1c46 155 #define PCI_DEVICE_ID_INTEL_UM67 0x1c47 156 #define PCI_DEVICE_ID_INTEL_HM65 0x1c49 157 #define PCI_DEVICE_ID_INTEL_H67 0x1c4a 158 #define PCI_DEVICE_ID_INTEL_HM67 0x1c4b 159 #define PCI_DEVICE_ID_INTEL_Q65 0x1c4c 160 #define PCI_DEVICE_ID_INTEL_QS67 0x1c4d 161 #define PCI_DEVICE_ID_INTEL_Q67 0x1c4e 162 #define PCI_DEVICE_ID_INTEL_QM67 0x1c4f 163 #define PCI_DEVICE_ID_INTEL_B65 0x1c50 164 #define PCI_DEVICE_ID_INTEL_C202 0x1c52 165 #define PCI_DEVICE_ID_INTEL_C204 0x1c54 166 #define PCI_DEVICE_ID_INTEL_C206 0x1c56 167 #define PCI_DEVICE_ID_INTEL_H61 0x1c5c 168 #define PCI_DEVICE_ID_INTEL_Z77 0x1e44 169 #define PCI_DEVICE_ID_INTEL_Z75 0x1e46 170 #define PCI_DEVICE_ID_INTEL_Q77 0x1e47 171 #define PCI_DEVICE_ID_INTEL_Q75 0x1e48 172 #define PCI_DEVICE_ID_INTEL_B75 0x1e49 173 #define PCI_DEVICE_ID_INTEL_H77 0x1e4a 174 #define PCI_DEVICE_ID_INTEL_C216 0x1e53 175 #define PCI_DEVICE_ID_INTEL_QM77 0x1e55 176 #define PCI_DEVICE_ID_INTEL_QS77 0x1e56 177 #define PCI_DEVICE_ID_INTEL_HM77 0x1e57 178 #define PCI_DEVICE_ID_INTEL_UM77 0x1e58 179 #define PCI_DEVICE_ID_INTEL_HM76 0x1e59 180 #define PCI_DEVICE_ID_INTEL_HM75 0x1e5d 181 #define PCI_DEVICE_ID_INTEL_HM70 0x1e5e 182 #define PCI_DEVICE_ID_INTEL_NM70 0x1e5f 183 #define PCI_DEVICE_ID_INTEL_DH89XXCC 0x2310 184 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL 0x9c41 185 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM 0x9c43 186 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE 0x9c45 187 #define PCI_DEVICE_ID_INTEL_H81 0x8c5c 188 #define PCI_DEVICE_ID_INTEL_B85 0x8c50 189 #define PCI_DEVICE_ID_INTEL_Q85 0x8c4c 190 #define PCI_DEVICE_ID_INTEL_Q87 0x8c4e 191 #define PCI_DEVICE_ID_INTEL_QM87 0x8c4f 192 #define PCI_DEVICE_ID_INTEL_H87 0x8c4a 193 #define PCI_DEVICE_ID_INTEL_HM87 0x8c4b 194 #define PCI_DEVICE_ID_INTEL_Z87 0x8c44 195 #define PCI_DEVICE_ID_INTEL_X99 0x8d47 196 #define PCI_DEVICE_ID_INTEL_WILDCAT_LP1 0x9cc1 197 #define PCI_DEVICE_ID_INTEL_WILDCAT_LP2 0x9cc2 198 #define PCI_DEVICE_ID_INTEL_WILDCAT_LP3 0x9cc3 199 #define PCI_DEVICE_ID_INTEL_WILDCAT_LP4 0x9cc5 200 #define PCI_DEVICE_ID_INTEL_WILDCAT_LP5 0x9cc6 201 #define PCI_DEVICE_ID_INTEL_WILDCAT_LP6 0x9cc7 202 #define PCI_DEVICE_ID_INTEL_WILDCAT_LP7 0x9cc9 203 #define PCI_DEVICE_ID_INTEL_SUNRISE_LP1 0x9d43 204 #define PCI_DEVICE_ID_INTEL_SUNRISE_LP2 0x9d48 205 #define PCI_DEVICE_ID_INTEL_SUNRISE_LP3 0x9d4e 206 #define PCI_DEVICE_ID_INTEL_SUNRISE_LP4 0x9d56 207 #define PCI_DEVICE_ID_INTEL_SUNRISE_LP5 0x9d58 208 #define PCI_DEVICE_ID_INTEL_SUNRISE_H0 0xa140 209 #define PCI_DEVICE_ID_INTEL_SUNRISE_H1 0xa141 210 #define PCI_DEVICE_ID_INTEL_SUNRISE_H2 0xa142 211 #define PCI_DEVICE_ID_INTEL_SUNRISE_H3 0xa143 212 #define PCI_DEVICE_ID_INTEL_SUNRISE_H4 0xa144 213 #define PCI_DEVICE_ID_INTEL_SUNRISE_H5 0xa145 214 #define PCI_DEVICE_ID_INTEL_SUNRISE_H6 0xa146 215 #define PCI_DEVICE_ID_INTEL_SUNRISE_H7 0xa147 216 #define PCI_DEVICE_ID_INTEL_SUNRISE_H8 0xa148 217 #define PCI_DEVICE_ID_INTEL_SUNRISE_H9 0xa149 218 #define PCI_DEVICE_ID_INTEL_SUNRISE_H10 0xa14a 219 #define PCI_DEVICE_ID_INTEL_SUNRISE_H11 0xa14b 220 #define PCI_DEVICE_ID_INTEL_SUNRISE_H12 0xa14c 221 #define PCI_DEVICE_ID_INTEL_SUNRISE_H13 0xa14d 222 #define PCI_DEVICE_ID_INTEL_SUNRISE_H14 0xa14e 223 #define PCI_DEVICE_ID_INTEL_SUNRISE_H15 0xa14f 224 #define PCI_DEVICE_ID_INTEL_SUNRISE_H16 0xa150 225 #define PCI_DEVICE_ID_INTEL_SUNRISE_H17 0xa151 226 #define PCI_DEVICE_ID_INTEL_SUNRISE_H18 0xa152 227 #define PCI_DEVICE_ID_INTEL_SUNRISE_H19 0xa153 228 #define PCI_DEVICE_ID_INTEL_SUNRISE_H20 0xa154 229 #define PCI_DEVICE_ID_INTEL_SUNRISE_H21 0xa155 230 #define PCI_DEVICE_ID_INTEL_SUNRISE_H22 0xa156 231 #define PCI_DEVICE_ID_INTEL_SUNRISE_H23 0xa157 232 #define PCI_DEVICE_ID_INTEL_SUNRISE_H24 0xa158 233 #define PCI_DEVICE_ID_INTEL_SUNRISE_H25 0xa159 234 #define PCI_DEVICE_ID_INTEL_SUNRISE_H26 0xa15a 235 #define PCI_DEVICE_ID_INTEL_SUNRISE_H27 0xa15b 236 #define PCI_DEVICE_ID_INTEL_SUNRISE_H28 0xa15c 237 #define PCI_DEVICE_ID_INTEL_SUNRISE_H29 0xa15d 238 #define PCI_DEVICE_ID_INTEL_SUNRISE_H30 0xa15e 239 #define PCI_DEVICE_ID_INTEL_SUNRISE_H31 0xa15f 240 #define PCI_DEVICE_ID_INTEL_LEWISBURG_1 0xa1c1 241 #define PCI_DEVICE_ID_INTEL_LEWISBURG_2 0xa1c2 242 #define PCI_DEVICE_ID_INTEL_LEWISBURG_3 0xa1c3 243 #define PCI_DEVICE_ID_INTEL_LEWISBURG_4 0xa1c4 244 #define PCI_DEVICE_ID_INTEL_LEWISBURG_5 0xa1c5 245 #define PCI_DEVICE_ID_INTEL_LEWISBURG_6 0xa1c6 246 #define PCI_DEVICE_ID_INTEL_LEWISBURG_7 0xa1c7 247 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_H270 0xa2c4 248 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_Z270 0xa2c5 249 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_Q270 0xa2c6 250 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_Q250 0xa2c7 251 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_B250 0xa2c8 252 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_Z370 0xa2c9 253 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_H310C 0xa2ca 254 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_X299 0xa2d2 255 256 #define PCI_DEV_HAS_ME_DIFFICULT(x) ( \ 257 ((x) == PCI_DEVICE_ID_INTEL_ICH10R) || \ 258 ((x) == PCI_DEVICE_ID_INTEL_3400_DESKTOP) || \ 259 ((x) == PCI_DEVICE_ID_INTEL_3400_MOBILE) || \ 260 ((x) == PCI_DEVICE_ID_INTEL_P55) || \ 261 ((x) == PCI_DEVICE_ID_INTEL_PM55) || \ 262 ((x) == PCI_DEVICE_ID_INTEL_H55) || \ 263 ((x) == PCI_DEVICE_ID_INTEL_QM57) || \ 264 ((x) == PCI_DEVICE_ID_INTEL_H57) || \ 265 ((x) == PCI_DEVICE_ID_INTEL_HM55) || \ 266 ((x) == PCI_DEVICE_ID_INTEL_Q57) || \ 267 ((x) == PCI_DEVICE_ID_INTEL_HM57) || \ 268 ((x) == PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF) || \ 269 ((x) == PCI_DEVICE_ID_INTEL_B55_A) || \ 270 ((x) == PCI_DEVICE_ID_INTEL_QS57) || \ 271 ((x) == PCI_DEVICE_ID_INTEL_3400) || \ 272 ((x) == PCI_DEVICE_ID_INTEL_3420) || \ 273 ((x) == PCI_DEVICE_ID_INTEL_3450) || \ 274 ((x) == PCI_DEVICE_ID_INTEL_B55_B) || \ 275 ((x) == PCI_DEVICE_ID_INTEL_Z68) || \ 276 ((x) == PCI_DEVICE_ID_INTEL_P67) || \ 277 ((x) == PCI_DEVICE_ID_INTEL_UM67) || \ 278 ((x) == PCI_DEVICE_ID_INTEL_HM65) || \ 279 ((x) == PCI_DEVICE_ID_INTEL_H67) || \ 280 ((x) == PCI_DEVICE_ID_INTEL_HM67) || \ 281 ((x) == PCI_DEVICE_ID_INTEL_Q65) || \ 282 ((x) == PCI_DEVICE_ID_INTEL_QS67) || \ 283 ((x) == PCI_DEVICE_ID_INTEL_Q67) || \ 284 ((x) == PCI_DEVICE_ID_INTEL_QM67) || \ 285 ((x) == PCI_DEVICE_ID_INTEL_B65) || \ 286 ((x) == PCI_DEVICE_ID_INTEL_C202) || \ 287 ((x) == PCI_DEVICE_ID_INTEL_C204) || \ 288 ((x) == PCI_DEVICE_ID_INTEL_C206) || \ 289 ((x) == PCI_DEVICE_ID_INTEL_H61) || \ 290 ((x) == PCI_DEVICE_ID_INTEL_Z77) || \ 291 ((x) == PCI_DEVICE_ID_INTEL_Z75) || \ 292 ((x) == PCI_DEVICE_ID_INTEL_Q77) || \ 293 ((x) == PCI_DEVICE_ID_INTEL_Q75) || \ 294 ((x) == PCI_DEVICE_ID_INTEL_B75) || \ 295 ((x) == PCI_DEVICE_ID_INTEL_H77) || \ 296 ((x) == PCI_DEVICE_ID_INTEL_C216) || \ 297 ((x) == PCI_DEVICE_ID_INTEL_QM77) || \ 298 ((x) == PCI_DEVICE_ID_INTEL_QS77) || \ 299 ((x) == PCI_DEVICE_ID_INTEL_HM77) || \ 300 ((x) == PCI_DEVICE_ID_INTEL_UM77) || \ 301 ((x) == PCI_DEVICE_ID_INTEL_HM76) || \ 302 ((x) == PCI_DEVICE_ID_INTEL_HM75) || \ 303 ((x) == PCI_DEVICE_ID_INTEL_HM70) || \ 304 ((x) == PCI_DEVICE_ID_INTEL_NM70) || \ 305 ((x) == PCI_DEVICE_ID_INTEL_DH89XXCC) || \ 306 ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL) || \ 307 ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM) || \ 308 ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE) || \ 309 ((x) == PCI_DEVICE_ID_INTEL_H81) || \ 310 ((x) == PCI_DEVICE_ID_INTEL_B85) || \ 311 ((x) == PCI_DEVICE_ID_INTEL_Q85) || \ 312 ((x) == PCI_DEVICE_ID_INTEL_Q87) || \ 313 ((x) == PCI_DEVICE_ID_INTEL_QM87) || \ 314 ((x) == PCI_DEVICE_ID_INTEL_H87) || \ 315 ((x) == PCI_DEVICE_ID_INTEL_HM87) || \ 316 ((x) == PCI_DEVICE_ID_INTEL_Z87) || \ 317 ((x) == PCI_DEVICE_ID_INTEL_X99) || \ 318 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP1) || \ 319 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP2) || \ 320 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP3) || \ 321 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP4) || \ 322 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP5) || \ 323 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP6) || \ 324 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP7) || \ 325 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP1) || \ 326 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP2) || \ 327 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP3) || \ 328 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP4) || \ 329 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP5) || \ 330 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H0) || \ 331 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H1) || \ 332 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H2) || \ 333 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H3) || \ 334 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H4) || \ 335 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H5) || \ 336 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H6) || \ 337 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H7) || \ 338 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H8) || \ 339 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H9) || \ 340 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H10) || \ 341 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H11) || \ 342 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H12) || \ 343 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H13) || \ 344 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H14) || \ 345 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H15) || \ 346 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H16) || \ 347 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H17) || \ 348 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H18) || \ 349 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H19) || \ 350 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H20) || \ 351 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H21) || \ 352 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H22) || \ 353 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H23) || \ 354 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H24) || \ 355 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H25) || \ 356 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H26) || \ 357 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H27) || \ 358 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H28) || \ 359 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H29) || \ 360 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H30) || \ 361 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H31) || \ 362 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_1) || \ 363 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_2) || \ 364 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_3) || \ 365 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_4) || \ 366 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_5) || \ 367 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_6) || \ 368 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_7) || \ 369 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_H270) || \ 370 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_Z270) || \ 371 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_Q270) || \ 372 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_Q250) || \ 373 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_B250) || \ 374 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_Z370) || \ 375 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_H310C) || \ 376 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_X299) || \ 377 0) 378 379 // Not sure if ME present, but should be able to disable it easily 380 #define PCI_DEVICE_ID_INTEL_ICH8 0x2810 381 #define PCI_DEVICE_ID_INTEL_ICH8M 0x2815 382 #define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912 383 #define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914 384 #define PCI_DEVICE_ID_INTEL_ICH9R 0x2916 385 #define PCI_DEVICE_ID_INTEL_ICH9 0x2918 386 387 #define PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(x) ( \ 388 ((x) == PCI_DEVICE_ID_INTEL_ICH8) || \ 389 ((x) == PCI_DEVICE_ID_INTEL_ICH8M) || \ 390 ((x) == PCI_DEVICE_ID_INTEL_ICH9DH) || \ 391 ((x) == PCI_DEVICE_ID_INTEL_ICH9DO) || \ 392 ((x) == PCI_DEVICE_ID_INTEL_ICH9R) || \ 393 ((x) == PCI_DEVICE_ID_INTEL_ICH9)) 394 395 // Not sure at all 396 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC 0x8119 397 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100 398 399 #define PCI_DEV_ME_NOT_SURE(x) ( \ 400 ((x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC) || \ 401 ((x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO)) 402 403 // ME PCI IDs (HECI) 404 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_1 0x1C3A /* Cougar Point */ 405 #define PCI_DEVICE_ID_INTEL_PATSBURG_1 0x1D3A /* C600/X79 Patsburg */ 406 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_1 0x1CBA /* Panther Point */ 407 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_2 0x1DBA /* Panther Point */ 408 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_3 0x1E3A /* Panther Point */ 409 #define PCI_DEVICE_ID_INTEL_CAVECREEK 0x2364 /* Cave Creek */ 410 #define PCI_DEVICE_ID_INTEL_BEARLAKE_1 0x28B4 /* Bearlake */ 411 #define PCI_DEVICE_ID_INTEL_BEARLAKE_2 0x28C4 /* Bearlake */ 412 #define PCI_DEVICE_ID_INTEL_BEARLAKE_3 0x28D4 /* Bearlake */ 413 #define PCI_DEVICE_ID_INTEL_BEARLAKE_4 0x28E4 /* Bearlake */ 414 #define PCI_DEVICE_ID_INTEL_BEARLAKE_5 0x28F4 /* Bearlake */ 415 #define PCI_DEVICE_ID_INTEL_82946GZ 0x2974 /* 82946GZ/GL */ 416 #define PCI_DEVICE_ID_INTEL_82G35 0x2984 /* 82G35 Express */ 417 #define PCI_DEVICE_ID_INTEL_82Q963 0x2994 /* 82Q963/Q965 */ 418 #define PCI_DEVICE_ID_INTEL_82P965 0x29A4 /* 82P965/G965 */ 419 #define PCI_DEVICE_ID_INTEL_82Q35 0x29B4 /* 82Q35 Express */ 420 #define PCI_DEVICE_ID_INTEL_82G33 0x29C4 /* 82G33/G31/P35/P31 Express */ 421 #define PCI_DEVICE_ID_INTEL_82Q33 0x29D4 /* 82Q33 Express */ 422 #define PCI_DEVICE_ID_INTEL_82X38 0x29E4 /* 82X38/X48 Express */ 423 #define PCI_DEVICE_ID_INTEL_3200 0x29F4 /* 3200/3210 Server */ 424 #define PCI_DEVICE_ID_INTEL_PM965 0x2A04 /* Mobile PM965/GM965 */ 425 #define PCI_DEVICE_ID_INTEL_GME965 0x2A14 /* Mobile GME965/GLE960 */ 426 #define PCI_DEVICE_ID_INTEL_CANTIGA_1 0x2A44 /* Cantiga */ 427 #define PCI_DEVICE_ID_INTEL_CANTIGA_2 0x2a50 /* Cantiga */ 428 #define PCI_DEVICE_ID_INTEL_CANTIGA_3 0x2A54 /* Cantiga */ 429 #define PCI_DEVICE_ID_INTEL_CANTIGA_4 0x2A64 /* Cantiga */ 430 #define PCI_DEVICE_ID_INTEL_CANTIGA_5 0x2A74 /* Cantiga */ 431 #define PCI_DEVICE_ID_INTEL_EAGLELAKE_1 0x2E04 /* Eaglelake */ 432 #define PCI_DEVICE_ID_INTEL_EAGLELAKE_2 0x2E14 /* Eaglelake */ 433 #define PCI_DEVICE_ID_INTEL_EAGLELAKE_3 0x2E24 /* Eaglelake */ 434 #define PCI_DEVICE_ID_INTEL_EAGLELAKE_4 0x2E34 /* Eaglelake */ 435 #define PCI_DEVICE_ID_INTEL_CALPELLA_1 0x3B64 /* Calpella */ 436 #define PCI_DEVICE_ID_INTEL_CALPELLA_2 0x3B65 /* Calpella */ 437 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_1 0x8C3A /* Lynx Point H */ 438 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_2 0x8CBA /* Lynx Point H Refresh */ 439 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_3 0x8D3A /* Lynx Point - Wellsburg */ 440 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_4 0x9C3A /* Lynx Point LP */ 441 #define PCI_DEVICE_ID_INTEL_WILDCAT_1 0x9CBA /* Wildcat Point LP */ 442 #define PCI_DEVICE_ID_INTEL_WILDCAT_2 0x9CBB /* Wildcat Point LP 2 */ 443 #define PCI_DEVICE_ID_INTEL_SUNRISE_LP 0x9d3a /* SUNRISE Point-LP */ 444 #define PCI_DEVICE_ID_INTEL_CANNONPOINT_LP 0x9de0 /* Cannon Point-LP */ 445 #define PCI_DEVICE_ID_INTEL_COMETPOINT_LP 0x02e0 /* Comet Point-LP (Cometlake-U) */ 446 #define PCI_DEVICE_ID_INTEL_SUNRISE_H1_ME 0xa13a /* SUNRISE Point-H 1 */ 447 #define PCI_DEVICE_ID_INTEL_SUNRISE_H2_ME 0xa13b /* SUNRISE Point-H 2 */ 448 #define PCI_DEVICE_ID_INTEL_SUNRISE_H3_ME 0xA13E /* SUNRISE Point-H 3 */ 449 #define PCI_DEVICE_ID_INTEL_LEWISBURG_CSME1 0xA1BA /* CSME Lewisburg #1 */ 450 #define PCI_DEVICE_ID_INTEL_LEWISBURG_CSME2 0xA1BB /* CSME Lewisburg #2 */ 451 #define PCI_DEVICE_ID_INTEL_LEWISBURG_CSME3 0xA1BE /* CSME Lewisburg #3 */ 452 #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE1 0xA1F8 /* IE Lewisburg #1 */ 453 #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE2 0xA1F9 /* IE Lewisburg #2 */ 454 #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE3 0xA1FC /* IE Lewisburg #3 */ 455 #define PCI_DEVICE_ID_INTEL_CANNONLAKE 0xA360 /* Cannon Lake */ 456 #define PCI_DEVICE_ID_INTEL_BAYTRAIL 0x0F18 /* Bay Trail */ 457 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI1 0xA2BA /* Union Point MEI #1 */ 458 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI2 0xA2BB /* Union Point MEI #2 */ 459 #define PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI3 0xA2BE /* Union Point MEI #3 */ 460 461 #define PCI_DEV_HAS_SUPPORTED_ME(x) ( \ 462 ((x) == PCI_DEVICE_ID_INTEL_COUGARPOINT_1) || \ 463 ((x) == PCI_DEVICE_ID_INTEL_PATSBURG_1) || \ 464 ((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_1) || \ 465 ((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_2) || \ 466 ((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_3) || \ 467 ((x) == PCI_DEVICE_ID_INTEL_CAVECREEK) || \ 468 ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_1) || \ 469 ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_2) || \ 470 ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_3) || \ 471 ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_4) || \ 472 ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_5) || \ 473 ((x) == PCI_DEVICE_ID_INTEL_82946GZ) || \ 474 ((x) == PCI_DEVICE_ID_INTEL_82G35) || \ 475 ((x) == PCI_DEVICE_ID_INTEL_82Q963) || \ 476 ((x) == PCI_DEVICE_ID_INTEL_82P965) || \ 477 ((x) == PCI_DEVICE_ID_INTEL_82Q35) || \ 478 ((x) == PCI_DEVICE_ID_INTEL_82G33) || \ 479 ((x) == PCI_DEVICE_ID_INTEL_82Q33) || \ 480 ((x) == PCI_DEVICE_ID_INTEL_82X38) || \ 481 ((x) == PCI_DEVICE_ID_INTEL_3200) || \ 482 ((x) == PCI_DEVICE_ID_INTEL_PM965) || \ 483 ((x) == PCI_DEVICE_ID_INTEL_GME965) || \ 484 ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_1) || \ 485 ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_2) || \ 486 ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_3) || \ 487 ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_4) || \ 488 ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_5) || \ 489 ((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_1) || \ 490 ((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_2) || \ 491 ((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_3) || \ 492 ((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_4) || \ 493 ((x) == PCI_DEVICE_ID_INTEL_CALPELLA_1) || \ 494 ((x) == PCI_DEVICE_ID_INTEL_CALPELLA_2) || \ 495 ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_1) || \ 496 ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_2) || \ 497 ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_3) || \ 498 ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_4) || \ 499 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_1) || \ 500 ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_2) || \ 501 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP) || \ 502 ((x) == PCI_DEVICE_ID_INTEL_CANNONPOINT_LP) || \ 503 ((x) == PCI_DEVICE_ID_INTEL_COMETPOINT_LP) || \ 504 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H1_ME) || \ 505 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H2_ME) || \ 506 ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H3_ME) || \ 507 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_CSME1) || \ 508 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_CSME2) || \ 509 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_CSME3) || \ 510 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE1) || \ 511 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE2) || \ 512 ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE3) || \ 513 ((x) == PCI_DEVICE_ID_INTEL_CANNONLAKE) || \ 514 ((x) == PCI_DEVICE_ID_INTEL_BAYTRAIL) || \ 515 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI1) || \ 516 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI2) || \ 517 ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI3) || \ 518 0) 519