1 #pragma once 2 3 #include <stdbool.h> 4 #include <stdint.h> 5 6 #include <cpuinfo.h> 7 #include <cpuinfo/common.h> 8 9 enum cpuinfo_arm_chipset_vendor { 10 cpuinfo_arm_chipset_vendor_unknown = 0, 11 cpuinfo_arm_chipset_vendor_qualcomm, 12 cpuinfo_arm_chipset_vendor_mediatek, 13 cpuinfo_arm_chipset_vendor_samsung, 14 cpuinfo_arm_chipset_vendor_hisilicon, 15 cpuinfo_arm_chipset_vendor_actions, 16 cpuinfo_arm_chipset_vendor_allwinner, 17 cpuinfo_arm_chipset_vendor_amlogic, 18 cpuinfo_arm_chipset_vendor_broadcom, 19 cpuinfo_arm_chipset_vendor_lg, 20 cpuinfo_arm_chipset_vendor_leadcore, 21 cpuinfo_arm_chipset_vendor_marvell, 22 cpuinfo_arm_chipset_vendor_mstar, 23 cpuinfo_arm_chipset_vendor_novathor, 24 cpuinfo_arm_chipset_vendor_nvidia, 25 cpuinfo_arm_chipset_vendor_pinecone, 26 cpuinfo_arm_chipset_vendor_renesas, 27 cpuinfo_arm_chipset_vendor_rockchip, 28 cpuinfo_arm_chipset_vendor_spreadtrum, 29 cpuinfo_arm_chipset_vendor_telechips, 30 cpuinfo_arm_chipset_vendor_texas_instruments, 31 cpuinfo_arm_chipset_vendor_unisoc, 32 cpuinfo_arm_chipset_vendor_wondermedia, 33 cpuinfo_arm_chipset_vendor_max, 34 }; 35 36 enum cpuinfo_arm_chipset_series { 37 cpuinfo_arm_chipset_series_unknown = 0, 38 cpuinfo_arm_chipset_series_qualcomm_qsd, 39 cpuinfo_arm_chipset_series_qualcomm_msm, 40 cpuinfo_arm_chipset_series_qualcomm_apq, 41 cpuinfo_arm_chipset_series_qualcomm_snapdragon, 42 cpuinfo_arm_chipset_series_mediatek_mt, 43 cpuinfo_arm_chipset_series_samsung_exynos, 44 cpuinfo_arm_chipset_series_hisilicon_k3v, 45 cpuinfo_arm_chipset_series_hisilicon_hi, 46 cpuinfo_arm_chipset_series_hisilicon_kirin, 47 cpuinfo_arm_chipset_series_actions_atm, 48 cpuinfo_arm_chipset_series_allwinner_a, 49 cpuinfo_arm_chipset_series_amlogic_aml, 50 cpuinfo_arm_chipset_series_amlogic_s, 51 cpuinfo_arm_chipset_series_broadcom_bcm, 52 cpuinfo_arm_chipset_series_lg_nuclun, 53 cpuinfo_arm_chipset_series_leadcore_lc, 54 cpuinfo_arm_chipset_series_marvell_pxa, 55 cpuinfo_arm_chipset_series_mstar_6a, 56 cpuinfo_arm_chipset_series_novathor_u, 57 cpuinfo_arm_chipset_series_nvidia_tegra_t, 58 cpuinfo_arm_chipset_series_nvidia_tegra_ap, 59 cpuinfo_arm_chipset_series_nvidia_tegra_sl, 60 cpuinfo_arm_chipset_series_pinecone_surge_s, 61 cpuinfo_arm_chipset_series_renesas_mp, 62 cpuinfo_arm_chipset_series_rockchip_rk, 63 cpuinfo_arm_chipset_series_spreadtrum_sc, 64 cpuinfo_arm_chipset_series_telechips_tcc, 65 cpuinfo_arm_chipset_series_texas_instruments_omap, 66 cpuinfo_arm_chipset_series_unisoc_t, 67 cpuinfo_arm_chipset_series_unisoc_ums, 68 cpuinfo_arm_chipset_series_wondermedia_wm, 69 cpuinfo_arm_chipset_series_max, 70 }; 71 72 #define CPUINFO_ARM_CHIPSET_SUFFIX_MAX 8 73 74 struct cpuinfo_arm_chipset { 75 enum cpuinfo_arm_chipset_vendor vendor; 76 enum cpuinfo_arm_chipset_series series; 77 uint32_t model; 78 char suffix[CPUINFO_ARM_CHIPSET_SUFFIX_MAX]; 79 }; 80 81 #define CPUINFO_ARM_CHIPSET_NAME_MAX CPUINFO_PACKAGE_NAME_MAX 82 83 #ifndef __cplusplus 84 CPUINFO_INTERNAL void cpuinfo_arm_chipset_to_string( 85 const struct cpuinfo_arm_chipset chipset[restrict static 1], 86 char name[restrict static CPUINFO_ARM_CHIPSET_NAME_MAX]); 87 88 CPUINFO_INTERNAL void cpuinfo_arm_fixup_chipset( 89 struct cpuinfo_arm_chipset chipset[restrict static 1], 90 uint32_t cores, 91 uint32_t max_cpu_freq_max); 92 93 CPUINFO_INTERNAL void cpuinfo_arm_decode_vendor_uarch( 94 uint32_t midr, 95 #if CPUINFO_ARCH_ARM 96 bool has_vfpv4, 97 #endif 98 enum cpuinfo_vendor vendor[restrict static 1], 99 enum cpuinfo_uarch uarch[restrict static 1]); 100 101 CPUINFO_INTERNAL void cpuinfo_arm_decode_cache( 102 enum cpuinfo_uarch uarch, 103 uint32_t cluster_cores, 104 uint32_t midr, 105 const struct cpuinfo_arm_chipset chipset[restrict static 1], 106 uint32_t cluster_id, 107 uint32_t arch_version, 108 struct cpuinfo_cache l1i[restrict static 1], 109 struct cpuinfo_cache l1d[restrict static 1], 110 struct cpuinfo_cache l2[restrict static 1], 111 struct cpuinfo_cache l3[restrict static 1]); 112 113 CPUINFO_INTERNAL uint32_t 114 cpuinfo_arm_compute_max_cache_size(const struct cpuinfo_processor processor[restrict static 1]); 115 #else /* defined(__cplusplus) */ 116 CPUINFO_INTERNAL void cpuinfo_arm_decode_cache( 117 enum cpuinfo_uarch uarch, 118 uint32_t cluster_cores, 119 uint32_t midr, 120 const struct cpuinfo_arm_chipset chipset[1], 121 uint32_t cluster_id, 122 uint32_t arch_version, 123 struct cpuinfo_cache l1i[1], 124 struct cpuinfo_cache l1d[1], 125 struct cpuinfo_cache l2[1], 126 struct cpuinfo_cache l3[1]); 127 #endif 128