1 #include <gtest/gtest.h>
2
3 #include <cpuinfo-mock.h>
4 #include <cpuinfo.h>
5
TEST(PROCESSORS,count)6 TEST(PROCESSORS, count) {
7 ASSERT_EQ(8, cpuinfo_get_processors_count());
8 }
9
TEST(PROCESSORS,non_null)10 TEST(PROCESSORS, non_null) {
11 ASSERT_TRUE(cpuinfo_get_processors());
12 }
13
TEST(PROCESSORS,smt_id)14 TEST(PROCESSORS, smt_id) {
15 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
16 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
17 }
18 }
19
TEST(PROCESSORS,core)20 TEST(PROCESSORS, core) {
21 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
22 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
23 }
24 }
25
TEST(PROCESSORS,cluster)26 TEST(PROCESSORS, cluster) {
27 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
28 switch (i) {
29 case 0:
30 case 1:
31 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
32 break;
33 case 2:
34 case 3:
35 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
36 break;
37 case 4:
38 case 5:
39 case 6:
40 case 7:
41 ASSERT_EQ(cpuinfo_get_cluster(2), cpuinfo_get_processor(i)->cluster);
42 break;
43 }
44 }
45 }
46
TEST(PROCESSORS,package)47 TEST(PROCESSORS, package) {
48 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
49 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
50 }
51 }
52
TEST(PROCESSORS,linux_id)53 TEST(PROCESSORS, linux_id) {
54 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
55 switch (i) {
56 case 0:
57 case 1:
58 ASSERT_EQ(i + 6, cpuinfo_get_processor(i)->linux_id);
59 break;
60 case 2:
61 case 3:
62 ASSERT_EQ(i + 2, cpuinfo_get_processor(i)->linux_id);
63 break;
64 case 4:
65 case 5:
66 case 6:
67 case 7:
68 ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id);
69 break;
70 }
71 }
72 }
73
TEST(PROCESSORS,l1i)74 TEST(PROCESSORS, l1i) {
75 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
76 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
77 }
78 }
79
TEST(PROCESSORS,l1d)80 TEST(PROCESSORS, l1d) {
81 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
82 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
83 }
84 }
85
TEST(PROCESSORS,l2)86 TEST(PROCESSORS, l2) {
87 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
88 ASSERT_EQ(cpuinfo_get_l2_cache(i), cpuinfo_get_processor(i)->cache.l2);
89 }
90 }
91
TEST(PROCESSORS,l3)92 TEST(PROCESSORS, l3) {
93 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
94 ASSERT_EQ(cpuinfo_get_l3_cache(0), cpuinfo_get_processor(i)->cache.l3);
95 }
96 }
97
TEST(PROCESSORS,l4)98 TEST(PROCESSORS, l4) {
99 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
100 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
101 }
102 }
103
TEST(CORES,count)104 TEST(CORES, count) {
105 ASSERT_EQ(8, cpuinfo_get_cores_count());
106 }
107
TEST(CORES,non_null)108 TEST(CORES, non_null) {
109 ASSERT_TRUE(cpuinfo_get_cores());
110 }
111
TEST(CORES,processor_start)112 TEST(CORES, processor_start) {
113 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
114 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
115 }
116 }
117
TEST(CORES,processor_count)118 TEST(CORES, processor_count) {
119 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
120 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
121 }
122 }
123
TEST(CORES,core_id)124 TEST(CORES, core_id) {
125 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
126 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
127 }
128 }
129
TEST(CORES,cluster)130 TEST(CORES, cluster) {
131 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
132 switch (i) {
133 case 0:
134 case 1:
135 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
136 break;
137 case 2:
138 case 3:
139 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
140 break;
141 case 4:
142 case 5:
143 case 6:
144 case 7:
145 ASSERT_EQ(cpuinfo_get_cluster(2), cpuinfo_get_core(i)->cluster);
146 break;
147 }
148 }
149 }
150
TEST(CORES,package)151 TEST(CORES, package) {
152 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
153 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
154 }
155 }
156
TEST(CORES,vendor)157 TEST(CORES, vendor) {
158 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
159 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
160 }
161 }
162
TEST(CORES,uarch)163 TEST(CORES, uarch) {
164 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
165 switch (i) {
166 case 0:
167 case 1:
168 case 2:
169 case 3:
170 ASSERT_EQ(cpuinfo_uarch_cortex_a76, cpuinfo_get_core(i)->uarch);
171 break;
172 case 4:
173 case 5:
174 case 6:
175 case 7:
176 ASSERT_EQ(cpuinfo_uarch_cortex_a55, cpuinfo_get_core(i)->uarch);
177 break;
178 }
179 }
180 }
181
TEST(CORES,midr)182 TEST(CORES, midr) {
183 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
184 switch (i) {
185 case 0:
186 case 1:
187 case 2:
188 case 3:
189 ASSERT_EQ(UINT32_C(0x481FD400), cpuinfo_get_core(i)->midr);
190 break;
191 case 4:
192 case 5:
193 case 6:
194 case 7:
195 ASSERT_EQ(UINT32_C(0x411FD050), cpuinfo_get_core(i)->midr);
196 break;
197 }
198 }
199 }
200
TEST(CORES,DISABLED_frequency)201 TEST(CORES, DISABLED_frequency) {
202 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
203 switch (i) {
204 case 0:
205 case 1:
206 ASSERT_EQ(UINT64_C(2600000000), cpuinfo_get_core(i)->frequency);
207 break;
208 case 2:
209 case 3:
210 ASSERT_EQ(UINT64_C(1901000000), cpuinfo_get_core(i)->frequency);
211 break;
212 case 4:
213 case 5:
214 case 6:
215 case 7:
216 ASSERT_EQ(UINT64_C(1805000000), cpuinfo_get_core(i)->frequency);
217 break;
218 }
219 }
220 }
221
TEST(CLUSTERS,count)222 TEST(CLUSTERS, count) {
223 ASSERT_EQ(3, cpuinfo_get_clusters_count());
224 }
225
TEST(CLUSTERS,non_null)226 TEST(CLUSTERS, non_null) {
227 ASSERT_TRUE(cpuinfo_get_clusters());
228 }
229
TEST(CLUSTERS,processor_start)230 TEST(CLUSTERS, processor_start) {
231 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
232 switch (i) {
233 case 0:
234 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
235 break;
236 case 1:
237 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_start);
238 break;
239 case 2:
240 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start);
241 break;
242 }
243 }
244 }
245
TEST(CLUSTERS,processor_count)246 TEST(CLUSTERS, processor_count) {
247 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
248 switch (i) {
249 case 0:
250 case 1:
251 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_count);
252 break;
253 case 2:
254 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
255 break;
256 }
257 }
258 }
259
TEST(CLUSTERS,core_start)260 TEST(CLUSTERS, core_start) {
261 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
262 switch (i) {
263 case 0:
264 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
265 break;
266 case 1:
267 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_start);
268 break;
269 case 2:
270 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start);
271 break;
272 }
273 }
274 }
275
TEST(CLUSTERS,core_count)276 TEST(CLUSTERS, core_count) {
277 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
278 switch (i) {
279 case 0:
280 case 1:
281 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_count);
282 break;
283 case 2:
284 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
285 break;
286 }
287 }
288 }
289
TEST(CLUSTERS,cluster_id)290 TEST(CLUSTERS, cluster_id) {
291 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
292 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
293 }
294 }
295
TEST(CLUSTERS,package)296 TEST(CLUSTERS, package) {
297 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
298 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
299 }
300 }
301
TEST(CLUSTERS,vendor)302 TEST(CLUSTERS, vendor) {
303 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
304 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
305 }
306 }
307
TEST(CLUSTERS,uarch)308 TEST(CLUSTERS, uarch) {
309 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
310 switch (i) {
311 case 0:
312 ASSERT_EQ(cpuinfo_uarch_cortex_a76, cpuinfo_get_cluster(i)->uarch);
313 break;
314 case 1:
315 ASSERT_EQ(cpuinfo_uarch_cortex_a76, cpuinfo_get_cluster(i)->uarch);
316 break;
317 case 2:
318 ASSERT_EQ(cpuinfo_uarch_cortex_a55, cpuinfo_get_cluster(i)->uarch);
319 break;
320 }
321 }
322 }
323
TEST(CLUSTERS,midr)324 TEST(CLUSTERS, midr) {
325 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
326 switch (i) {
327 case 0:
328 ASSERT_EQ(UINT32_C(0x481FD400), cpuinfo_get_cluster(i)->midr);
329 break;
330 case 1:
331 ASSERT_EQ(UINT32_C(0x481FD400), cpuinfo_get_cluster(i)->midr);
332 break;
333 case 2:
334 ASSERT_EQ(UINT32_C(0x411FD050), cpuinfo_get_cluster(i)->midr);
335 break;
336 }
337 }
338 }
339
TEST(CLUSTERS,DISABLED_frequency)340 TEST(CLUSTERS, DISABLED_frequency) {
341 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
342 switch (i) {
343 case 0:
344 ASSERT_EQ(UINT64_C(2600000000), cpuinfo_get_core(i)->frequency);
345 break;
346 case 1:
347 ASSERT_EQ(UINT64_C(1901000000), cpuinfo_get_core(i)->frequency);
348 break;
349 case 2:
350 ASSERT_EQ(UINT64_C(1805000000), cpuinfo_get_core(i)->frequency);
351 break;
352 }
353 }
354 }
355
TEST(PACKAGES,count)356 TEST(PACKAGES, count) {
357 ASSERT_EQ(1, cpuinfo_get_packages_count());
358 }
359
TEST(PACKAGES,name)360 TEST(PACKAGES, name) {
361 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
362 ASSERT_EQ(
363 "HiSilicon Kirin 980",
364 std::string(
365 cpuinfo_get_package(i)->name,
366 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
367 }
368 }
369
TEST(PACKAGES,processor_start)370 TEST(PACKAGES, processor_start) {
371 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
372 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
373 }
374 }
375
TEST(PACKAGES,processor_count)376 TEST(PACKAGES, processor_count) {
377 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
378 ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
379 }
380 }
381
TEST(PACKAGES,core_start)382 TEST(PACKAGES, core_start) {
383 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
384 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
385 }
386 }
387
TEST(PACKAGES,core_count)388 TEST(PACKAGES, core_count) {
389 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
390 ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
391 }
392 }
393
TEST(PACKAGES,cluster_start)394 TEST(PACKAGES, cluster_start) {
395 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
396 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
397 }
398 }
399
TEST(PACKAGES,cluster_count)400 TEST(PACKAGES, cluster_count) {
401 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
402 ASSERT_EQ(3, cpuinfo_get_package(i)->cluster_count);
403 }
404 }
405
TEST(ISA,thumb)406 TEST(ISA, thumb) {
407 #if CPUINFO_ARCH_ARM
408 ASSERT_TRUE(cpuinfo_has_arm_thumb());
409 #elif CPUINFO_ARCH_ARM64
410 ASSERT_FALSE(cpuinfo_has_arm_thumb());
411 #endif
412 }
413
TEST(ISA,thumb2)414 TEST(ISA, thumb2) {
415 #if CPUINFO_ARCH_ARM
416 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
417 #elif CPUINFO_ARCH_ARM64
418 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
419 #endif
420 }
421
TEST(ISA,armv5e)422 TEST(ISA, armv5e) {
423 #if CPUINFO_ARCH_ARM
424 ASSERT_TRUE(cpuinfo_has_arm_v5e());
425 #elif CPUINFO_ARCH_ARM64
426 ASSERT_FALSE(cpuinfo_has_arm_v5e());
427 #endif
428 }
429
TEST(ISA,armv6)430 TEST(ISA, armv6) {
431 #if CPUINFO_ARCH_ARM
432 ASSERT_TRUE(cpuinfo_has_arm_v6());
433 #elif CPUINFO_ARCH_ARM64
434 ASSERT_FALSE(cpuinfo_has_arm_v6());
435 #endif
436 }
437
TEST(ISA,armv6k)438 TEST(ISA, armv6k) {
439 #if CPUINFO_ARCH_ARM
440 ASSERT_TRUE(cpuinfo_has_arm_v6k());
441 #elif CPUINFO_ARCH_ARM64
442 ASSERT_FALSE(cpuinfo_has_arm_v6k());
443 #endif
444 }
445
TEST(ISA,armv7)446 TEST(ISA, armv7) {
447 #if CPUINFO_ARCH_ARM
448 ASSERT_TRUE(cpuinfo_has_arm_v7());
449 #elif CPUINFO_ARCH_ARM64
450 ASSERT_FALSE(cpuinfo_has_arm_v7());
451 #endif
452 }
453
TEST(ISA,armv7mp)454 TEST(ISA, armv7mp) {
455 #if CPUINFO_ARCH_ARM
456 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
457 #elif CPUINFO_ARCH_ARM64
458 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
459 #endif
460 }
461
TEST(ISA,idiv)462 TEST(ISA, idiv) {
463 ASSERT_TRUE(cpuinfo_has_arm_idiv());
464 }
465
TEST(ISA,vfpv2)466 TEST(ISA, vfpv2) {
467 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
468 }
469
TEST(ISA,vfpv3)470 TEST(ISA, vfpv3) {
471 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
472 }
473
TEST(ISA,vfpv3_d32)474 TEST(ISA, vfpv3_d32) {
475 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
476 }
477
TEST(ISA,vfpv3_fp16)478 TEST(ISA, vfpv3_fp16) {
479 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
480 }
481
TEST(ISA,vfpv3_fp16_d32)482 TEST(ISA, vfpv3_fp16_d32) {
483 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
484 }
485
TEST(ISA,vfpv4)486 TEST(ISA, vfpv4) {
487 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
488 }
489
TEST(ISA,vfpv4_d32)490 TEST(ISA, vfpv4_d32) {
491 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
492 }
493
TEST(ISA,wmmx)494 TEST(ISA, wmmx) {
495 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
496 }
497
TEST(ISA,wmmx2)498 TEST(ISA, wmmx2) {
499 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
500 }
501
TEST(ISA,neon)502 TEST(ISA, neon) {
503 ASSERT_TRUE(cpuinfo_has_arm_neon());
504 }
505
TEST(ISA,neon_fp16)506 TEST(ISA, neon_fp16) {
507 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
508 }
509
TEST(ISA,neon_fma)510 TEST(ISA, neon_fma) {
511 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
512 }
513
TEST(ISA,atomics)514 TEST(ISA, atomics) {
515 #if CPUINFO_ARCH_ARM
516 ASSERT_FALSE(cpuinfo_has_arm_atomics());
517 #elif CPUINFO_ARCH_ARM64
518 ASSERT_TRUE(cpuinfo_has_arm_atomics());
519 #endif
520 }
521
TEST(ISA,neon_rdm)522 TEST(ISA, neon_rdm) {
523 ASSERT_TRUE(cpuinfo_has_arm_neon_rdm());
524 }
525
TEST(ISA,fp16_arith)526 TEST(ISA, fp16_arith) {
527 ASSERT_TRUE(cpuinfo_has_arm_fp16_arith());
528 }
529
TEST(ISA,neon_fp16_arith)530 TEST(ISA, neon_fp16_arith) {
531 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16_arith());
532 }
533
TEST(ISA,neon_dot)534 TEST(ISA, neon_dot) {
535 ASSERT_TRUE(cpuinfo_has_arm_neon_dot());
536 }
537
TEST(ISA,jscvt)538 TEST(ISA, jscvt) {
539 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
540 }
541
TEST(ISA,fcma)542 TEST(ISA, fcma) {
543 ASSERT_FALSE(cpuinfo_has_arm_fcma());
544 }
545
TEST(ISA,aes)546 TEST(ISA, aes) {
547 ASSERT_TRUE(cpuinfo_has_arm_aes());
548 }
549
TEST(ISA,sha1)550 TEST(ISA, sha1) {
551 ASSERT_TRUE(cpuinfo_has_arm_sha1());
552 }
553
TEST(ISA,sha2)554 TEST(ISA, sha2) {
555 ASSERT_TRUE(cpuinfo_has_arm_sha2());
556 }
557
TEST(ISA,pmull)558 TEST(ISA, pmull) {
559 ASSERT_TRUE(cpuinfo_has_arm_pmull());
560 }
561
TEST(ISA,crc32)562 TEST(ISA, crc32) {
563 ASSERT_TRUE(cpuinfo_has_arm_crc32());
564 }
565
TEST(L1I,count)566 TEST(L1I, count) {
567 ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
568 }
569
TEST(L1I,non_null)570 TEST(L1I, non_null) {
571 ASSERT_TRUE(cpuinfo_get_l1i_caches());
572 }
573
TEST(L1I,size)574 TEST(L1I, size) {
575 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
576 switch (i) {
577 case 0:
578 case 1:
579 case 2:
580 case 3:
581 ASSERT_EQ(64 * 1024, cpuinfo_get_l1i_cache(i)->size);
582 break;
583 case 4:
584 case 5:
585 case 6:
586 case 7:
587 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
588 break;
589 }
590 }
591 }
592
TEST(L1I,associativity)593 TEST(L1I, associativity) {
594 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
595 ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
596 }
597 }
598
TEST(L1I,sets)599 TEST(L1I, sets) {
600 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
601 ASSERT_EQ(
602 cpuinfo_get_l1i_cache(i)->size,
603 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size *
604 cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
605 }
606 }
607
TEST(L1I,partitions)608 TEST(L1I, partitions) {
609 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
610 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
611 }
612 }
613
TEST(L1I,line_size)614 TEST(L1I, line_size) {
615 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
616 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
617 }
618 }
619
TEST(L1I,flags)620 TEST(L1I, flags) {
621 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
622 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
623 }
624 }
625
TEST(L1I,processors)626 TEST(L1I, processors) {
627 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
628 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
629 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
630 }
631 }
632
TEST(L1D,count)633 TEST(L1D, count) {
634 ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
635 }
636
TEST(L1D,non_null)637 TEST(L1D, non_null) {
638 ASSERT_TRUE(cpuinfo_get_l1d_caches());
639 }
640
TEST(L1D,size)641 TEST(L1D, size) {
642 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
643 switch (i) {
644 case 0:
645 case 1:
646 case 2:
647 case 3:
648 ASSERT_EQ(64 * 1024, cpuinfo_get_l1d_cache(i)->size);
649 break;
650 case 4:
651 case 5:
652 case 6:
653 case 7:
654 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
655 break;
656 }
657 }
658 }
659
TEST(L1D,associativity)660 TEST(L1D, associativity) {
661 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
662 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
663 }
664 }
665
TEST(L1D,sets)666 TEST(L1D, sets) {
667 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
668 ASSERT_EQ(
669 cpuinfo_get_l1d_cache(i)->size,
670 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size *
671 cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
672 }
673 }
674
TEST(L1D,partitions)675 TEST(L1D, partitions) {
676 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
677 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
678 }
679 }
680
TEST(L1D,line_size)681 TEST(L1D, line_size) {
682 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
683 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
684 }
685 }
686
TEST(L1D,flags)687 TEST(L1D, flags) {
688 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
689 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
690 }
691 }
692
TEST(L1D,processors)693 TEST(L1D, processors) {
694 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
695 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
696 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
697 }
698 }
699
TEST(L2,count)700 TEST(L2, count) {
701 ASSERT_EQ(8, cpuinfo_get_l2_caches_count());
702 }
703
TEST(L2,non_null)704 TEST(L2, non_null) {
705 ASSERT_TRUE(cpuinfo_get_l2_caches());
706 }
707
TEST(L2,size)708 TEST(L2, size) {
709 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
710 switch (i) {
711 case 0:
712 case 1:
713 case 2:
714 case 3:
715 ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
716 break;
717 case 4:
718 case 5:
719 case 6:
720 case 7:
721 ASSERT_EQ(128 * 1024, cpuinfo_get_l2_cache(i)->size);
722 break;
723 }
724 }
725 }
726
TEST(L2,associativity)727 TEST(L2, associativity) {
728 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
729 switch (i) {
730 case 0:
731 case 1:
732 case 2:
733 case 3:
734 ASSERT_EQ(8, cpuinfo_get_l2_cache(i)->associativity);
735 break;
736 case 4:
737 case 5:
738 case 6:
739 case 7:
740 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->associativity);
741 break;
742 }
743 }
744 }
745
TEST(L2,sets)746 TEST(L2, sets) {
747 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
748 ASSERT_EQ(
749 cpuinfo_get_l2_cache(i)->size,
750 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size *
751 cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
752 }
753 }
754
TEST(L2,partitions)755 TEST(L2, partitions) {
756 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
757 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
758 }
759 }
760
TEST(L2,line_size)761 TEST(L2, line_size) {
762 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
763 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
764 }
765 }
766
TEST(L2,flags)767 TEST(L2, flags) {
768 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
769 switch (i) {
770 case 0:
771 case 1:
772 case 2:
773 case 3:
774 ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags);
775 break;
776 case 4:
777 case 5:
778 case 6:
779 case 7:
780 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
781 break;
782 }
783 }
784 }
785
TEST(L2,processors)786 TEST(L2, processors) {
787 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
788 ASSERT_EQ(i, cpuinfo_get_l2_cache(i)->processor_start);
789 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->processor_count);
790 }
791 }
792
TEST(L3,count)793 TEST(L3, count) {
794 ASSERT_EQ(1, cpuinfo_get_l3_caches_count());
795 }
796
TEST(L3,non_null)797 TEST(L3, non_null) {
798 ASSERT_TRUE(cpuinfo_get_l3_caches());
799 }
800
TEST(L3,size)801 TEST(L3, size) {
802 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
803 ASSERT_EQ(4 * 1024 * 1024, cpuinfo_get_l3_cache(i)->size);
804 }
805 }
806
TEST(L3,associativity)807 TEST(L3, associativity) {
808 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
809 ASSERT_EQ(16, cpuinfo_get_l3_cache(i)->associativity);
810 }
811 }
812
TEST(L3,sets)813 TEST(L3, sets) {
814 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
815 ASSERT_EQ(
816 cpuinfo_get_l3_cache(i)->size,
817 cpuinfo_get_l3_cache(i)->sets * cpuinfo_get_l3_cache(i)->line_size *
818 cpuinfo_get_l3_cache(i)->partitions * cpuinfo_get_l3_cache(i)->associativity);
819 }
820 }
821
TEST(L3,partitions)822 TEST(L3, partitions) {
823 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
824 ASSERT_EQ(1, cpuinfo_get_l3_cache(i)->partitions);
825 }
826 }
827
TEST(L3,line_size)828 TEST(L3, line_size) {
829 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
830 ASSERT_EQ(64, cpuinfo_get_l3_cache(i)->line_size);
831 }
832 }
833
TEST(L3,flags)834 TEST(L3, flags) {
835 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
836 ASSERT_EQ(0, cpuinfo_get_l3_cache(i)->flags);
837 }
838 }
839
TEST(L4,none)840 TEST(L4, none) {
841 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
842 ASSERT_FALSE(cpuinfo_get_l4_caches());
843 }
844
845 #include <huawei-mate-20.h>
846
main(int argc,char * argv[])847 int main(int argc, char* argv[]) {
848 #if CPUINFO_ARCH_ARM
849 cpuinfo_set_hwcap(UINT32_C(0x0037B0D6));
850 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
851 #elif CPUINFO_ARCH_ARM64
852 cpuinfo_set_hwcap(UINT32_C(0x000007FF));
853 #endif
854 cpuinfo_mock_filesystem(filesystem);
855 #ifdef __ANDROID__
856 cpuinfo_mock_android_properties(properties);
857 #endif
858 cpuinfo_initialize();
859 ::testing::InitGoogleTest(&argc, argv);
860 return RUN_ALL_TESTS();
861 }
862