1 #include <gtest/gtest.h>
2
3 #include <cpuinfo-mock.h>
4 #include <cpuinfo.h>
5
TEST(PROCESSORS,count)6 TEST(PROCESSORS, count) {
7 ASSERT_EQ(10, cpuinfo_get_processors_count());
8 }
9
TEST(PROCESSORS,non_null)10 TEST(PROCESSORS, non_null) {
11 ASSERT_TRUE(cpuinfo_get_processors());
12 }
13
TEST(PROCESSORS,smt_id)14 TEST(PROCESSORS, smt_id) {
15 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
16 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
17 }
18 }
19
TEST(PROCESSORS,core)20 TEST(PROCESSORS, core) {
21 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
22 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
23 }
24 }
25
TEST(PROCESSORS,cluster)26 TEST(PROCESSORS, cluster) {
27 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
28 switch (i) {
29 case 0:
30 case 1:
31 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
32 break;
33 case 2:
34 case 3:
35 case 4:
36 case 5:
37 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
38 break;
39 case 6:
40 case 7:
41 case 8:
42 case 9:
43 ASSERT_EQ(cpuinfo_get_cluster(2), cpuinfo_get_processor(i)->cluster);
44 break;
45 }
46 }
47 }
48
TEST(PROCESSORS,package)49 TEST(PROCESSORS, package) {
50 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
51 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
52 }
53 }
54
TEST(PROCESSORS,linux_id)55 TEST(PROCESSORS, linux_id) {
56 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
57 switch (i) {
58 case 0:
59 case 1:
60 ASSERT_EQ(i + 8, cpuinfo_get_processor(i)->linux_id);
61 break;
62 case 2:
63 case 3:
64 case 4:
65 case 5:
66 ASSERT_EQ(i + 2, cpuinfo_get_processor(i)->linux_id);
67 break;
68 case 6:
69 case 7:
70 case 8:
71 case 9:
72 ASSERT_EQ(i - 6, cpuinfo_get_processor(i)->linux_id);
73 break;
74 }
75 }
76 }
77
TEST(PROCESSORS,l1i)78 TEST(PROCESSORS, l1i) {
79 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
80 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
81 }
82 }
83
TEST(PROCESSORS,l1d)84 TEST(PROCESSORS, l1d) {
85 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
86 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
87 }
88 }
89
TEST(PROCESSORS,l2)90 TEST(PROCESSORS, l2) {
91 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
92 switch (i) {
93 case 0:
94 case 1:
95 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
96 break;
97 case 2:
98 case 3:
99 case 4:
100 case 5:
101 ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
102 break;
103 case 6:
104 case 7:
105 case 8:
106 case 9:
107 ASSERT_EQ(cpuinfo_get_l2_cache(2), cpuinfo_get_processor(i)->cache.l2);
108 break;
109 }
110 }
111 }
112
TEST(PROCESSORS,l3)113 TEST(PROCESSORS, l3) {
114 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
115 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
116 }
117 }
118
TEST(PROCESSORS,l4)119 TEST(PROCESSORS, l4) {
120 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
121 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
122 }
123 }
124
TEST(CORES,count)125 TEST(CORES, count) {
126 ASSERT_EQ(10, cpuinfo_get_cores_count());
127 }
128
TEST(CORES,non_null)129 TEST(CORES, non_null) {
130 ASSERT_TRUE(cpuinfo_get_cores());
131 }
132
TEST(CORES,processor_start)133 TEST(CORES, processor_start) {
134 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
135 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
136 }
137 }
138
TEST(CORES,processor_count)139 TEST(CORES, processor_count) {
140 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
141 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
142 }
143 }
144
TEST(CORES,core_id)145 TEST(CORES, core_id) {
146 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
147 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
148 }
149 }
150
TEST(CORES,cluster)151 TEST(CORES, cluster) {
152 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
153 switch (i) {
154 case 0:
155 case 1:
156 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
157 break;
158 case 2:
159 case 3:
160 case 4:
161 case 5:
162 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
163 break;
164 case 6:
165 case 7:
166 case 8:
167 case 9:
168 ASSERT_EQ(cpuinfo_get_cluster(2), cpuinfo_get_core(i)->cluster);
169 break;
170 }
171 }
172 }
173
TEST(CORES,package)174 TEST(CORES, package) {
175 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
176 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
177 }
178 }
179
TEST(CORES,vendor)180 TEST(CORES, vendor) {
181 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
182 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
183 }
184 }
185
TEST(CORES,uarch)186 TEST(CORES, uarch) {
187 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
188 switch (i) {
189 case 0:
190 case 1:
191 ASSERT_EQ(cpuinfo_uarch_cortex_a72, cpuinfo_get_core(i)->uarch);
192 break;
193 case 2:
194 case 3:
195 case 4:
196 case 5:
197 case 6:
198 case 7:
199 case 8:
200 case 9:
201 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
202 break;
203 }
204 }
205 }
206
TEST(CORES,midr)207 TEST(CORES, midr) {
208 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
209 switch (i) {
210 case 0:
211 case 1:
212 ASSERT_EQ(UINT32_C(0x410FD081), cpuinfo_get_core(i)->midr);
213 break;
214 case 2:
215 case 3:
216 case 4:
217 case 5:
218 case 6:
219 case 7:
220 case 8:
221 case 9:
222 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr);
223 break;
224 }
225 }
226 }
227
TEST(CORES,DISABLED_frequency)228 TEST(CORES, DISABLED_frequency) {
229 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
230 switch (i) {
231 case 0:
232 case 1:
233 ASSERT_EQ(UINT64_C(2522000000), cpuinfo_get_core(i)->frequency);
234 break;
235 case 2:
236 case 3:
237 case 4:
238 case 5:
239 ASSERT_EQ(UINT64_C(2002000000), cpuinfo_get_core(i)->frequency);
240 break;
241 case 6:
242 case 7:
243 case 8:
244 case 9:
245 ASSERT_EQ(UINT64_C(1547000000), cpuinfo_get_core(i)->frequency);
246 break;
247 }
248 }
249 }
250
TEST(CLUSTERS,count)251 TEST(CLUSTERS, count) {
252 ASSERT_EQ(3, cpuinfo_get_clusters_count());
253 }
254
TEST(CLUSTERS,non_null)255 TEST(CLUSTERS, non_null) {
256 ASSERT_TRUE(cpuinfo_get_clusters());
257 }
258
TEST(CLUSTERS,processor_start)259 TEST(CLUSTERS, processor_start) {
260 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
261 switch (i) {
262 case 0:
263 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
264 break;
265 case 1:
266 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_start);
267 break;
268 case 2:
269 ASSERT_EQ(6, cpuinfo_get_cluster(i)->processor_start);
270 break;
271 }
272 }
273 }
274
TEST(CLUSTERS,processor_count)275 TEST(CLUSTERS, processor_count) {
276 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
277 switch (i) {
278 case 0:
279 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_count);
280 break;
281 case 1:
282 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
283 break;
284 case 2:
285 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
286 break;
287 }
288 }
289 }
290
TEST(CLUSTERS,core_start)291 TEST(CLUSTERS, core_start) {
292 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
293 switch (i) {
294 case 0:
295 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
296 break;
297 case 1:
298 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_start);
299 break;
300 case 2:
301 ASSERT_EQ(6, cpuinfo_get_cluster(i)->core_start);
302 break;
303 }
304 }
305 }
306
TEST(CLUSTERS,core_count)307 TEST(CLUSTERS, core_count) {
308 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
309 switch (i) {
310 case 0:
311 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_count);
312 break;
313 case 1:
314 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
315 break;
316 case 2:
317 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
318 break;
319 }
320 }
321 }
322
TEST(CLUSTERS,cluster_id)323 TEST(CLUSTERS, cluster_id) {
324 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
325 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
326 }
327 }
328
TEST(CLUSTERS,package)329 TEST(CLUSTERS, package) {
330 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
331 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
332 }
333 }
334
TEST(CLUSTERS,vendor)335 TEST(CLUSTERS, vendor) {
336 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
337 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
338 }
339 }
340
TEST(CLUSTERS,uarch)341 TEST(CLUSTERS, uarch) {
342 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
343 switch (i) {
344 case 0:
345 ASSERT_EQ(cpuinfo_uarch_cortex_a72, cpuinfo_get_cluster(i)->uarch);
346 break;
347 case 1:
348 case 2:
349 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch);
350 break;
351 }
352 }
353 }
354
TEST(CLUSTERS,midr)355 TEST(CLUSTERS, midr) {
356 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
357 switch (i) {
358 case 0:
359 ASSERT_EQ(UINT32_C(0x410FD081), cpuinfo_get_cluster(i)->midr);
360 break;
361 case 1:
362 case 2:
363 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr);
364 break;
365 }
366 }
367 }
368
TEST(CLUSTERS,DISABLED_frequency)369 TEST(CLUSTERS, DISABLED_frequency) {
370 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
371 switch (i) {
372 case 0:
373 ASSERT_EQ(UINT64_C(2522000000), cpuinfo_get_cluster(i)->frequency);
374 break;
375 case 1:
376 ASSERT_EQ(UINT64_C(2002000000), cpuinfo_get_cluster(i)->frequency);
377 break;
378 case 2:
379 ASSERT_EQ(UINT64_C(1547000000), cpuinfo_get_cluster(i)->frequency);
380 break;
381 }
382 }
383 }
384
TEST(PACKAGES,count)385 TEST(PACKAGES, count) {
386 ASSERT_EQ(1, cpuinfo_get_packages_count());
387 }
388
TEST(PACKAGES,name)389 TEST(PACKAGES, name) {
390 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
391 ASSERT_EQ(
392 "MediaTek MT6797T",
393 std::string(
394 cpuinfo_get_package(i)->name,
395 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
396 }
397 }
398
TEST(PACKAGES,processor_start)399 TEST(PACKAGES, processor_start) {
400 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
401 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
402 }
403 }
404
TEST(PACKAGES,processor_count)405 TEST(PACKAGES, processor_count) {
406 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
407 ASSERT_EQ(10, cpuinfo_get_package(i)->processor_count);
408 }
409 }
410
TEST(PACKAGES,core_start)411 TEST(PACKAGES, core_start) {
412 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
413 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
414 }
415 }
416
TEST(PACKAGES,core_count)417 TEST(PACKAGES, core_count) {
418 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
419 ASSERT_EQ(10, cpuinfo_get_package(i)->core_count);
420 }
421 }
422
TEST(PACKAGES,cluster_start)423 TEST(PACKAGES, cluster_start) {
424 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
425 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
426 }
427 }
428
TEST(PACKAGES,cluster_count)429 TEST(PACKAGES, cluster_count) {
430 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
431 ASSERT_EQ(3, cpuinfo_get_package(i)->cluster_count);
432 }
433 }
434
TEST(ISA,thumb)435 TEST(ISA, thumb) {
436 #if CPUINFO_ARCH_ARM
437 ASSERT_TRUE(cpuinfo_has_arm_thumb());
438 #elif CPUINFO_ARCH_ARM64
439 ASSERT_FALSE(cpuinfo_has_arm_thumb());
440 #endif
441 }
442
TEST(ISA,thumb2)443 TEST(ISA, thumb2) {
444 #if CPUINFO_ARCH_ARM
445 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
446 #elif CPUINFO_ARCH_ARM64
447 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
448 #endif
449 }
450
TEST(ISA,armv5e)451 TEST(ISA, armv5e) {
452 #if CPUINFO_ARCH_ARM
453 ASSERT_TRUE(cpuinfo_has_arm_v5e());
454 #elif CPUINFO_ARCH_ARM64
455 ASSERT_FALSE(cpuinfo_has_arm_v5e());
456 #endif
457 }
458
TEST(ISA,armv6)459 TEST(ISA, armv6) {
460 #if CPUINFO_ARCH_ARM
461 ASSERT_TRUE(cpuinfo_has_arm_v6());
462 #elif CPUINFO_ARCH_ARM64
463 ASSERT_FALSE(cpuinfo_has_arm_v6());
464 #endif
465 }
466
TEST(ISA,armv6k)467 TEST(ISA, armv6k) {
468 #if CPUINFO_ARCH_ARM
469 ASSERT_TRUE(cpuinfo_has_arm_v6k());
470 #elif CPUINFO_ARCH_ARM64
471 ASSERT_FALSE(cpuinfo_has_arm_v6k());
472 #endif
473 }
474
TEST(ISA,armv7)475 TEST(ISA, armv7) {
476 #if CPUINFO_ARCH_ARM
477 ASSERT_TRUE(cpuinfo_has_arm_v7());
478 #elif CPUINFO_ARCH_ARM64
479 ASSERT_FALSE(cpuinfo_has_arm_v7());
480 #endif
481 }
482
TEST(ISA,armv7mp)483 TEST(ISA, armv7mp) {
484 #if CPUINFO_ARCH_ARM
485 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
486 #elif CPUINFO_ARCH_ARM64
487 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
488 #endif
489 }
490
TEST(ISA,idiv)491 TEST(ISA, idiv) {
492 ASSERT_TRUE(cpuinfo_has_arm_idiv());
493 }
494
TEST(ISA,vfpv2)495 TEST(ISA, vfpv2) {
496 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
497 }
498
TEST(ISA,vfpv3)499 TEST(ISA, vfpv3) {
500 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
501 }
502
TEST(ISA,vfpv3_d32)503 TEST(ISA, vfpv3_d32) {
504 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
505 }
506
TEST(ISA,vfpv3_fp16)507 TEST(ISA, vfpv3_fp16) {
508 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
509 }
510
TEST(ISA,vfpv3_fp16_d32)511 TEST(ISA, vfpv3_fp16_d32) {
512 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
513 }
514
TEST(ISA,vfpv4)515 TEST(ISA, vfpv4) {
516 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
517 }
518
TEST(ISA,vfpv4_d32)519 TEST(ISA, vfpv4_d32) {
520 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
521 }
522
TEST(ISA,wmmx)523 TEST(ISA, wmmx) {
524 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
525 }
526
TEST(ISA,wmmx2)527 TEST(ISA, wmmx2) {
528 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
529 }
530
TEST(ISA,neon)531 TEST(ISA, neon) {
532 ASSERT_TRUE(cpuinfo_has_arm_neon());
533 }
534
TEST(ISA,neon_fp16)535 TEST(ISA, neon_fp16) {
536 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
537 }
538
TEST(ISA,neon_fma)539 TEST(ISA, neon_fma) {
540 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
541 }
542
TEST(ISA,atomics)543 TEST(ISA, atomics) {
544 ASSERT_FALSE(cpuinfo_has_arm_atomics());
545 }
546
TEST(ISA,neon_rdm)547 TEST(ISA, neon_rdm) {
548 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
549 }
550
TEST(ISA,fp16_arith)551 TEST(ISA, fp16_arith) {
552 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
553 }
554
TEST(ISA,neon_fp16_arith)555 TEST(ISA, neon_fp16_arith) {
556 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith());
557 }
558
TEST(ISA,neon_dot)559 TEST(ISA, neon_dot) {
560 ASSERT_FALSE(cpuinfo_has_arm_neon_dot());
561 }
562
TEST(ISA,jscvt)563 TEST(ISA, jscvt) {
564 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
565 }
566
TEST(ISA,fcma)567 TEST(ISA, fcma) {
568 ASSERT_FALSE(cpuinfo_has_arm_fcma());
569 }
570
TEST(ISA,aes)571 TEST(ISA, aes) {
572 ASSERT_TRUE(cpuinfo_has_arm_aes());
573 }
574
TEST(ISA,sha1)575 TEST(ISA, sha1) {
576 ASSERT_TRUE(cpuinfo_has_arm_sha1());
577 }
578
TEST(ISA,sha2)579 TEST(ISA, sha2) {
580 ASSERT_TRUE(cpuinfo_has_arm_sha2());
581 }
582
TEST(ISA,pmull)583 TEST(ISA, pmull) {
584 ASSERT_TRUE(cpuinfo_has_arm_pmull());
585 }
586
TEST(ISA,crc32)587 TEST(ISA, crc32) {
588 ASSERT_TRUE(cpuinfo_has_arm_crc32());
589 }
590
TEST(L1I,count)591 TEST(L1I, count) {
592 ASSERT_EQ(10, cpuinfo_get_l1i_caches_count());
593 }
594
TEST(L1I,non_null)595 TEST(L1I, non_null) {
596 ASSERT_TRUE(cpuinfo_get_l1i_caches());
597 }
598
TEST(L1I,size)599 TEST(L1I, size) {
600 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
601 switch (i) {
602 case 0:
603 case 1:
604 ASSERT_EQ(48 * 1024, cpuinfo_get_l1i_cache(i)->size);
605 break;
606 case 2:
607 case 3:
608 case 4:
609 case 5:
610 case 6:
611 case 7:
612 case 8:
613 case 9:
614 ASSERT_EQ(16 * 1024, cpuinfo_get_l1i_cache(i)->size);
615 break;
616 }
617 }
618 }
619
TEST(L1I,associativity)620 TEST(L1I, associativity) {
621 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
622 switch (i) {
623 case 0:
624 case 1:
625 ASSERT_EQ(3, cpuinfo_get_l1i_cache(i)->associativity);
626 break;
627 case 2:
628 case 3:
629 case 4:
630 case 5:
631 case 6:
632 case 7:
633 case 8:
634 case 9:
635 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
636 break;
637 }
638 }
639 }
640
TEST(L1I,sets)641 TEST(L1I, sets) {
642 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
643 ASSERT_EQ(
644 cpuinfo_get_l1i_cache(i)->size,
645 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size *
646 cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
647 }
648 }
649
TEST(L1I,partitions)650 TEST(L1I, partitions) {
651 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
652 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
653 }
654 }
655
TEST(L1I,line_size)656 TEST(L1I, line_size) {
657 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
658 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
659 }
660 }
661
TEST(L1I,flags)662 TEST(L1I, flags) {
663 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
664 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
665 }
666 }
667
TEST(L1I,processors)668 TEST(L1I, processors) {
669 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
670 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
671 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
672 }
673 }
674
TEST(L1D,count)675 TEST(L1D, count) {
676 ASSERT_EQ(10, cpuinfo_get_l1d_caches_count());
677 }
678
TEST(L1D,non_null)679 TEST(L1D, non_null) {
680 ASSERT_TRUE(cpuinfo_get_l1d_caches());
681 }
682
TEST(L1D,size)683 TEST(L1D, size) {
684 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
685 switch (i) {
686 case 0:
687 case 1:
688 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
689 break;
690 case 2:
691 case 3:
692 case 4:
693 case 5:
694 case 6:
695 case 7:
696 case 8:
697 case 9:
698 ASSERT_EQ(16 * 1024, cpuinfo_get_l1d_cache(i)->size);
699 break;
700 }
701 }
702 }
703
TEST(L1D,associativity)704 TEST(L1D, associativity) {
705 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
706 switch (i) {
707 case 0:
708 case 1:
709 ASSERT_EQ(2, cpuinfo_get_l1d_cache(i)->associativity);
710 break;
711 case 2:
712 case 3:
713 case 4:
714 case 5:
715 case 6:
716 case 7:
717 case 8:
718 case 9:
719 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
720 break;
721 }
722 }
723 }
724
TEST(L1D,sets)725 TEST(L1D, sets) {
726 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
727 ASSERT_EQ(
728 cpuinfo_get_l1d_cache(i)->size,
729 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size *
730 cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
731 }
732 }
733
TEST(L1D,partitions)734 TEST(L1D, partitions) {
735 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
736 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
737 }
738 }
739
TEST(L1D,line_size)740 TEST(L1D, line_size) {
741 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
742 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
743 }
744 }
745
TEST(L1D,flags)746 TEST(L1D, flags) {
747 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
748 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
749 }
750 }
751
TEST(L1D,processors)752 TEST(L1D, processors) {
753 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
754 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
755 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
756 }
757 }
758
TEST(L2,count)759 TEST(L2, count) {
760 ASSERT_EQ(3, cpuinfo_get_l2_caches_count());
761 }
762
TEST(L2,non_null)763 TEST(L2, non_null) {
764 ASSERT_TRUE(cpuinfo_get_l2_caches());
765 }
766
TEST(L2,size)767 TEST(L2, size) {
768 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
769 switch (i) {
770 case 0:
771 ASSERT_EQ(1 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size);
772 break;
773 case 1:
774 case 2:
775 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
776 break;
777 }
778 }
779 }
780
TEST(L2,associativity)781 TEST(L2, associativity) {
782 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
783 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
784 }
785 }
786
TEST(L2,sets)787 TEST(L2, sets) {
788 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
789 ASSERT_EQ(
790 cpuinfo_get_l2_cache(i)->size,
791 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size *
792 cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
793 }
794 }
795
TEST(L2,partitions)796 TEST(L2, partitions) {
797 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
798 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
799 }
800 }
801
TEST(L2,line_size)802 TEST(L2, line_size) {
803 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
804 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
805 }
806 }
807
TEST(L2,flags)808 TEST(L2, flags) {
809 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
810 switch (i) {
811 case 0:
812 ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags);
813 break;
814 case 1:
815 case 2:
816 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
817 break;
818 }
819 }
820 }
821
TEST(L2,processors)822 TEST(L2, processors) {
823 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
824 switch (i) {
825 case 0:
826 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
827 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count);
828 break;
829 case 1:
830 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_start);
831 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
832 break;
833 case 2:
834 ASSERT_EQ(6, cpuinfo_get_l2_cache(i)->processor_start);
835 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
836 break;
837 }
838 }
839 }
840
TEST(L3,none)841 TEST(L3, none) {
842 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
843 ASSERT_FALSE(cpuinfo_get_l3_caches());
844 }
845
TEST(L4,none)846 TEST(L4, none) {
847 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
848 ASSERT_FALSE(cpuinfo_get_l4_caches());
849 }
850
851 #include <meizu-pro-6s.h>
852
main(int argc,char * argv[])853 int main(int argc, char* argv[]) {
854 #if CPUINFO_ARCH_ARM
855 cpuinfo_set_hwcap(UINT32_C(0x0037B0D6));
856 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
857 #elif CPUINFO_ARCH_ARM64
858 cpuinfo_set_hwcap(UINT32_C(0x000000FF));
859 #endif
860 cpuinfo_mock_filesystem(filesystem);
861 #ifdef __ANDROID__
862 cpuinfo_mock_android_properties(properties);
863 #endif
864 cpuinfo_initialize();
865 ::testing::InitGoogleTest(&argc, argv);
866 return RUN_ALL_TESTS();
867 }