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1 // Copyright 2017 Google LLC
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //    http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 // Interface to retrieve hardware capabilities. It relies on Linux's getauxval
16 // or `/proc/self/auxval` under the hood.
17 #ifndef CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_
18 #define CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_
19 
20 #include <stdbool.h>
21 #include <stdint.h>
22 
23 #include "cpu_features_macros.h"
24 
25 CPU_FEATURES_START_CPP_NAMESPACE
26 
27 // To avoid depending on the linux kernel we reproduce the architecture specific
28 // constants here.
29 
30 // http://elixir.free-electrons.com/linux/latest/source/arch/arm64/include/uapi/asm/hwcap.h
31 #define AARCH64_HWCAP_FP (1UL << 0)
32 #define AARCH64_HWCAP_ASIMD (1UL << 1)
33 #define AARCH64_HWCAP_EVTSTRM (1UL << 2)
34 #define AARCH64_HWCAP_AES (1UL << 3)
35 #define AARCH64_HWCAP_PMULL (1UL << 4)
36 #define AARCH64_HWCAP_SHA1 (1UL << 5)
37 #define AARCH64_HWCAP_SHA2 (1UL << 6)
38 #define AARCH64_HWCAP_CRC32 (1UL << 7)
39 #define AARCH64_HWCAP_ATOMICS (1UL << 8)
40 #define AARCH64_HWCAP_FPHP (1UL << 9)
41 #define AARCH64_HWCAP_ASIMDHP (1UL << 10)
42 #define AARCH64_HWCAP_CPUID (1UL << 11)
43 #define AARCH64_HWCAP_ASIMDRDM (1UL << 12)
44 #define AARCH64_HWCAP_JSCVT (1UL << 13)
45 #define AARCH64_HWCAP_FCMA (1UL << 14)
46 #define AARCH64_HWCAP_LRCPC (1UL << 15)
47 #define AARCH64_HWCAP_DCPOP (1UL << 16)
48 #define AARCH64_HWCAP_SHA3 (1UL << 17)
49 #define AARCH64_HWCAP_SM3 (1UL << 18)
50 #define AARCH64_HWCAP_SM4 (1UL << 19)
51 #define AARCH64_HWCAP_ASIMDDP (1UL << 20)
52 #define AARCH64_HWCAP_SHA512 (1UL << 21)
53 #define AARCH64_HWCAP_SVE (1UL << 22)
54 #define AARCH64_HWCAP_ASIMDFHM (1UL << 23)
55 #define AARCH64_HWCAP_DIT (1UL << 24)
56 #define AARCH64_HWCAP_USCAT (1UL << 25)
57 #define AARCH64_HWCAP_ILRCPC (1UL << 26)
58 #define AARCH64_HWCAP_FLAGM (1UL << 27)
59 #define AARCH64_HWCAP_SSBS (1UL << 28)
60 #define AARCH64_HWCAP_SB (1UL << 29)
61 #define AARCH64_HWCAP_PACA (1UL << 30)
62 #define AARCH64_HWCAP_PACG (1UL << 31)
63 
64 #define AARCH64_HWCAP2_DCPODP (1UL << 0)
65 #define AARCH64_HWCAP2_SVE2 (1UL << 1)
66 #define AARCH64_HWCAP2_SVEAES (1UL << 2)
67 #define AARCH64_HWCAP2_SVEPMULL (1UL << 3)
68 #define AARCH64_HWCAP2_SVEBITPERM (1UL << 4)
69 #define AARCH64_HWCAP2_SVESHA3 (1UL << 5)
70 #define AARCH64_HWCAP2_SVESM4 (1UL << 6)
71 #define AARCH64_HWCAP2_FLAGM2 (1UL << 7)
72 #define AARCH64_HWCAP2_FRINT (1UL << 8)
73 #define AARCH64_HWCAP2_SVEI8MM (1UL << 9)
74 #define AARCH64_HWCAP2_SVEF32MM (1UL << 10)
75 #define AARCH64_HWCAP2_SVEF64MM (1UL << 11)
76 #define AARCH64_HWCAP2_SVEBF16 (1UL << 12)
77 #define AARCH64_HWCAP2_I8MM (1UL << 13)
78 #define AARCH64_HWCAP2_BF16 (1UL << 14)
79 #define AARCH64_HWCAP2_DGH (1UL << 15)
80 #define AARCH64_HWCAP2_RNG (1UL << 16)
81 #define AARCH64_HWCAP2_BTI (1UL << 17)
82 #define AARCH64_HWCAP2_MTE (1UL << 18)
83 #define AARCH64_HWCAP2_ECV (1UL << 19)
84 #define AARCH64_HWCAP2_AFP (1UL << 20)
85 #define AARCH64_HWCAP2_RPRES (1UL << 21)
86 
87 // http://elixir.free-electrons.com/linux/latest/source/arch/arm/include/uapi/asm/hwcap.h
88 #define ARM_HWCAP_SWP (1UL << 0)
89 #define ARM_HWCAP_HALF (1UL << 1)
90 #define ARM_HWCAP_THUMB (1UL << 2)
91 #define ARM_HWCAP_26BIT (1UL << 3)
92 #define ARM_HWCAP_FAST_MULT (1UL << 4)
93 #define ARM_HWCAP_FPA (1UL << 5)
94 #define ARM_HWCAP_VFP (1UL << 6)
95 #define ARM_HWCAP_EDSP (1UL << 7)
96 #define ARM_HWCAP_JAVA (1UL << 8)
97 #define ARM_HWCAP_IWMMXT (1UL << 9)
98 #define ARM_HWCAP_CRUNCH (1UL << 10)
99 #define ARM_HWCAP_THUMBEE (1UL << 11)
100 #define ARM_HWCAP_NEON (1UL << 12)
101 #define ARM_HWCAP_VFPV3 (1UL << 13)
102 #define ARM_HWCAP_VFPV3D16 (1UL << 14)
103 #define ARM_HWCAP_TLS (1UL << 15)
104 #define ARM_HWCAP_VFPV4 (1UL << 16)
105 #define ARM_HWCAP_IDIVA (1UL << 17)
106 #define ARM_HWCAP_IDIVT (1UL << 18)
107 #define ARM_HWCAP_VFPD32 (1UL << 19)
108 #define ARM_HWCAP_LPAE (1UL << 20)
109 #define ARM_HWCAP_EVTSTRM (1UL << 21)
110 #define ARM_HWCAP2_AES (1UL << 0)
111 #define ARM_HWCAP2_PMULL (1UL << 1)
112 #define ARM_HWCAP2_SHA1 (1UL << 2)
113 #define ARM_HWCAP2_SHA2 (1UL << 3)
114 #define ARM_HWCAP2_CRC32 (1UL << 4)
115 
116 // http://elixir.free-electrons.com/linux/latest/source/arch/mips/include/uapi/asm/hwcap.h
117 #define MIPS_HWCAP_R6 (1UL << 0)
118 #define MIPS_HWCAP_MSA (1UL << 1)
119 #define MIPS_HWCAP_CRC32 (1UL << 2)
120 #define MIPS_HWCAP_MIPS16 (1UL << 3)
121 #define MIPS_HWCAP_MDMX (1UL << 4)
122 #define MIPS_HWCAP_MIPS3D (1UL << 5)
123 #define MIPS_HWCAP_SMARTMIPS (1UL << 6)
124 #define MIPS_HWCAP_DSP (1UL << 7)
125 #define MIPS_HWCAP_DSP2 (1UL << 8)
126 #define MIPS_HWCAP_DSP3 (1UL << 9)
127 
128 // http://elixir.free-electrons.com/linux/latest/source/arch/powerpc/include/uapi/asm/cputable.h
129 #ifndef _UAPI__ASM_POWERPC_CPUTABLE_H
130 /* in AT_HWCAP */
131 #define PPC_FEATURE_32 0x80000000
132 #define PPC_FEATURE_64 0x40000000
133 #define PPC_FEATURE_601_INSTR 0x20000000
134 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000
135 #define PPC_FEATURE_HAS_FPU 0x08000000
136 #define PPC_FEATURE_HAS_MMU 0x04000000
137 #define PPC_FEATURE_HAS_4xxMAC 0x02000000
138 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000
139 #define PPC_FEATURE_HAS_SPE 0x00800000
140 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
141 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
142 #define PPC_FEATURE_NO_TB 0x00100000
143 #define PPC_FEATURE_POWER4 0x00080000
144 #define PPC_FEATURE_POWER5 0x00040000
145 #define PPC_FEATURE_POWER5_PLUS 0x00020000
146 #define PPC_FEATURE_CELL 0x00010000
147 #define PPC_FEATURE_BOOKE 0x00008000
148 #define PPC_FEATURE_SMT 0x00004000
149 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000
150 #define PPC_FEATURE_ARCH_2_05 0x00001000
151 #define PPC_FEATURE_PA6T 0x00000800
152 #define PPC_FEATURE_HAS_DFP 0x00000400
153 #define PPC_FEATURE_POWER6_EXT 0x00000200
154 #define PPC_FEATURE_ARCH_2_06 0x00000100
155 #define PPC_FEATURE_HAS_VSX 0x00000080
156 
157 #define PPC_FEATURE_PSERIES_PERFMON_COMPAT 0x00000040
158 
159 /* Reserved - do not use                0x00000004 */
160 #define PPC_FEATURE_TRUE_LE 0x00000002
161 #define PPC_FEATURE_PPC_LE 0x00000001
162 
163 /* in AT_HWCAP2 */
164 #define PPC_FEATURE2_ARCH_2_07 0x80000000
165 #define PPC_FEATURE2_HTM 0x40000000
166 #define PPC_FEATURE2_DSCR 0x20000000
167 #define PPC_FEATURE2_EBB 0x10000000
168 #define PPC_FEATURE2_ISEL 0x08000000
169 #define PPC_FEATURE2_TAR 0x04000000
170 #define PPC_FEATURE2_VEC_CRYPTO 0x02000000
171 #define PPC_FEATURE2_HTM_NOSC 0x01000000
172 #define PPC_FEATURE2_ARCH_3_00 0x00800000
173 #define PPC_FEATURE2_HAS_IEEE128 0x00400000
174 #define PPC_FEATURE2_DARN 0x00200000
175 #define PPC_FEATURE2_SCV 0x00100000
176 #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000
177 #endif
178 
179 // https://elixir.bootlin.com/linux/v6.0-rc6/source/arch/s390/include/asm/elf.h
180 #define HWCAP_S390_ESAN3        1
181 #define HWCAP_S390_ZARCH        2
182 #define HWCAP_S390_STFLE        4
183 #define HWCAP_S390_MSA          8
184 #define HWCAP_S390_LDISP        16
185 #define HWCAP_S390_EIMM         32
186 #define HWCAP_S390_DFP          64
187 #define HWCAP_S390_HPAGE        128
188 #define HWCAP_S390_ETF3EH       256
189 #define HWCAP_S390_HIGH_GPRS    512
190 #define HWCAP_S390_TE           1024
191 #define HWCAP_S390_VX           2048
192 #define HWCAP_S390_VXRS         HWCAP_S390_VX
193 #define HWCAP_S390_VXD          4096
194 #define HWCAP_S390_VXRS_BCD     HWCAP_S390_VXD
195 #define HWCAP_S390_VXE          8192
196 #define HWCAP_S390_VXRS_EXT     HWCAP_S390_VXE
197 #define HWCAP_S390_GS           16384
198 #define HWCAP_S390_VXRS_EXT2    32768
199 #define HWCAP_S390_VXRS_PDE     65536
200 #define HWCAP_S390_SORT         131072
201 #define HWCAP_S390_DFLT         262144
202 #define HWCAP_S390_VXRS_PDE2    524288
203 #define HWCAP_S390_NNPA         1048576
204 #define HWCAP_S390_PCI_MIO      2097152
205 #define HWCAP_S390_SIE          4194304
206 
207 // https://elixir.bootlin.com/linux/latest/source/arch/riscv/include/uapi/asm/hwcap.h
208 #define RISCV_HWCAP_32 0x32
209 #define RISCV_HWCAP_64 0x64
210 #define RISCV_HWCAP_128 0x128
211 #define RISCV_HWCAP_M (1UL << ('M' - 'A'))
212 #define RISCV_HWCAP_A (1UL << ('A' - 'A'))
213 #define RISCV_HWCAP_F (1UL << ('F' - 'A'))
214 #define RISCV_HWCAP_D (1UL << ('D' - 'A'))
215 #define RISCV_HWCAP_Q (1UL << ('Q' - 'A'))
216 #define RISCV_HWCAP_C (1UL << ('C' - 'A'))
217 #define RISCV_HWCAP_V (1UL << ('V' - 'A'))
218 
219 typedef struct {
220   unsigned long hwcaps;
221   unsigned long hwcaps2;
222 } HardwareCapabilities;
223 
224 // Retrieves values from auxiliary vector for types AT_HWCAP and AT_HWCAP2.
225 // First tries to call getauxval(), if not available falls back to reading
226 // "/proc/self/auxv".
227 HardwareCapabilities CpuFeatures_GetHardwareCapabilities(void);
228 
229 // Checks whether value for AT_HWCAP (or AT_HWCAP2) match hwcaps_mask.
230 bool CpuFeatures_IsHwCapsSet(const HardwareCapabilities hwcaps_mask,
231                              const HardwareCapabilities hwcaps);
232 
233 // Get pointer for the AT_PLATFORM type.
234 const char* CpuFeatures_GetPlatformPointer(void);
235 // Get pointer for the AT_BASE_PLATFORM type.
236 const char* CpuFeatures_GetBasePlatformPointer(void);
237 
238 CPU_FEATURES_END_CPP_NAMESPACE
239 
240 #endif  // CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_
241