1 /* 2 * Copyright (c) 2014-2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_vebox_g9_X.h 24 //! \brief Defines functions for constructing vebox commands on Gen9-based platforms 25 26 #ifndef __MHW_VEBOX_G9_X_H__ 27 #define __MHW_VEBOX_G9_X_H__ 28 29 #include "mhw_vebox_generic.h" 30 #include "mhw_vebox_hwcmd_g9_X.h" 31 32 #define MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT_G9 64 //!< Forward Gamma Correction Control Points for Gen9 33 #define ABSMAXABSMIN_THRESHOLD_DEFAULT_G9 320 34 const MHW_VEBOX_SETTINGS g_Vebox_Settings_g9 = 35 { 36 MHW_MAX_VEBOX_STATES, //!< uiNumInstances 37 MHW_SYNC_SIZE, //!< uiSyncSize 38 MHW_PAGE_SIZE, //!< uiDndiStateSize 39 MHW_PAGE_SIZE, //!< uiIecpStateSize 40 MHW_PAGE_SIZE, //!< uiGamutStateSize 41 MHW_PAGE_SIZE, //!< uiVertexTableSize 42 MHW_PAGE_SIZE, //!< uiCapturePipeStateSize 43 MHW_PAGE_SIZE, //!< uiGammaCorrectionStateSize 44 0 //!< uiHdrStateSize 45 }; 46 47 class MhwVeboxInterfaceG9 : public MhwVeboxInterfaceGeneric<mhw_vebox_g9_X> 48 { 49 public: 50 MhwVeboxInterfaceG9( 51 PMOS_INTERFACE pInputInterface); 52 ~MhwVeboxInterfaceG9()53 virtual ~MhwVeboxInterfaceG9() { MHW_FUNCTION_ENTER; } 54 55 MOS_STATUS VeboxAdjustBoundary( 56 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam, 57 uint32_t *pdwSurfaceWidth, 58 uint32_t *pdwSurfaceHeight, 59 bool bDIEnable); 60 61 MOS_STATUS AddVeboxState( 62 PMOS_COMMAND_BUFFER pCmdBuffer, 63 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams, 64 bool bUseCmBuffer); 65 66 MOS_STATUS AddVeboxDiIecp( 67 PMOS_COMMAND_BUFFER pCmdBuffer, 68 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams); 69 70 MOS_STATUS AddVeboxDndiState( 71 PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams); 72 73 MOS_STATUS AddVeboxIecpState( 74 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams); 75 76 MOS_STATUS AddVeboxGamutState( 77 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams, 78 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams); 79 SetVeboxIecpStateSTE(mhw_vebox_g9_X::VEBOX_STD_STE_STATE_CMD * pVeboxStdSteState,PMHW_COLORPIPE_PARAMS pColorPipeParams)80 MOS_STATUS SetVeboxIecpStateSTE( 81 mhw_vebox_g9_X::VEBOX_STD_STE_STATE_CMD *pVeboxStdSteState, 82 PMHW_COLORPIPE_PARAMS pColorPipeParams) 83 { 84 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 85 86 MHW_FUNCTION_ENTER; 87 88 MHW_CHK_NULL(pVeboxStdSteState); 89 MHW_CHK_NULL(pColorPipeParams); 90 91 MhwVeboxInterfaceGeneric<mhw_vebox_g9_X>::SetVeboxIecpStateSTE(pVeboxStdSteState, pColorPipeParams); 92 // Enable Skin Score Output surface to be written by Vebox 93 pVeboxStdSteState->DW1.StdScoreOutput = pColorPipeParams->bEnableLACE && pColorPipeParams->LaceParams.bSTD; 94 95 finish: 96 return eStatus; 97 } 98 99 MOS_STATUS AddVeboxIecpAceState( 100 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams); 101 102 MOS_STATUS GetVeboxAce_FullImageHistogram( 103 uint32_t *pFullImageHistogram); 104 105 MOS_STATUS AddVeboxSurfaceControlBits( 106 PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams, 107 uint32_t *pSurfCtrlBits); 108 109 private: 110 111 void SetVeboxSurfaces( 112 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam, 113 PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam, 114 PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam, 115 mhw_vebox_g9_X::VEBOX_SURFACE_STATE_CMD *pVeboxSurfaceState, 116 bool bIsOutputSurface, 117 bool bDIEnable); 118 //! 119 //! \brief Set Vebox Iecp State Back-End CSC 120 //! \details Set Back-End CSC part of the VEBOX IECP States 121 //! \param [in] pVeboxIecpState 122 //! Pointer to VEBOX IECP States 123 //! \param [in] pVeboxIecpParams 124 //! Pointer to VEBOX IECP State Params 125 //! \param [in] bEnableFECSC 126 //! Flag to enable FECSC 127 //! \return void 128 //! 129 void SetVeboxIecpStateBecsc( 130 mhw_vebox_g9_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState, 131 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams, 132 bool bEnableFECSC); 133 134 //! 135 //! \brief init VEBOX IECP States 136 //! \details init Vebox IECP states STD/E,ACE,TCC,AlphaAoi, 137 //! \param [in] pVeboxIecpStateCmd 138 //! Pointer to Vebox Interface Structure 139 //! \return void 140 //! 141 void IecpStateInitialization( 142 mhw_vebox_g9_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState); 143 //! 144 //! \brief init VEBOX Gammute State 145 //! \details init VEBOX Gammute State 146 //! \param [in] pGamutState 147 //! Pointer to VEBOX_GAMUT_STATE_CMD Structure 148 //! \return void 149 //! 150 void GamutStateInitialization( 151 mhw_vebox_g9_X::VEBOX_GAMUT_STATE_CMD *pGamutState); 152 }; 153 154 #endif 155