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1 /*
2  *  Copyright 2011 The LibYuv Project Authors. All rights reserved.
3  *
4  *  Use of this source code is governed by a BSD-style license
5  *  that can be found in the LICENSE file in the root of the source
6  *  tree. An additional intellectual property rights grant can be found
7  *  in the file PATENTS. All contributing project authors may
8  *  be found in the AUTHORS file in the root of the source tree.
9  */
10 
11 #include "libyuv/cpu_id.h"
12 
13 #if defined(_MSC_VER)
14 #include <intrin.h>  // For __cpuidex()
15 #endif
16 #if !defined(__pnacl__) && !defined(__CLR_VER) &&                           \
17     !defined(__native_client__) && (defined(_M_IX86) || defined(_M_X64)) && \
18     defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
19 #include <immintrin.h>  // For _xgetbv()
20 #endif
21 
22 // For ArmCpuCaps() but unittested on all platforms
23 #include <stdio.h>
24 #include <string.h>
25 
26 #ifdef __cplusplus
27 namespace libyuv {
28 extern "C" {
29 #endif
30 
31 // For functions that use the stack and have runtime checks for overflow,
32 // use SAFEBUFFERS to avoid additional check.
33 #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219) && \
34     !defined(__clang__)
35 #define SAFEBUFFERS __declspec(safebuffers)
36 #else
37 #define SAFEBUFFERS
38 #endif
39 
40 // cpu_info_ variable for SIMD instruction sets detected.
41 LIBYUV_API int cpu_info_ = 0;
42 
43 // TODO(fbarchard): Consider using int for cpuid so casting is not needed.
44 // Low level cpuid for X86.
45 #if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \
46      defined(__x86_64__)) &&                                     \
47     !defined(__pnacl__) && !defined(__CLR_VER)
48 LIBYUV_API
CpuId(int info_eax,int info_ecx,int * cpu_info)49 void CpuId(int info_eax, int info_ecx, int* cpu_info) {
50 #if defined(_MSC_VER)
51 // Visual C version uses intrinsic or inline x86 assembly.
52 #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
53   __cpuidex(cpu_info, info_eax, info_ecx);
54 #elif defined(_M_IX86)
55   __asm {
56     mov        eax, info_eax
57     mov        ecx, info_ecx
58     mov        edi, cpu_info
59     cpuid
60     mov        [edi], eax
61     mov        [edi + 4], ebx
62     mov        [edi + 8], ecx
63     mov        [edi + 12], edx
64   }
65 #else  // Visual C but not x86
66   if (info_ecx == 0) {
67     __cpuid(cpu_info, info_eax);
68   } else {
69     cpu_info[3] = cpu_info[2] = cpu_info[1] = cpu_info[0] = 0u;
70   }
71 #endif
72 // GCC version uses inline x86 assembly.
73 #else  // defined(_MSC_VER)
74   int info_ebx, info_edx;
75   asm volatile(
76 #if defined(__i386__) && defined(__PIC__)
77       // Preserve ebx for fpic 32 bit.
78       "mov %%ebx, %%edi                          \n"
79       "cpuid                                     \n"
80       "xchg %%edi, %%ebx                         \n"
81       : "=D"(info_ebx),
82 #else
83       "cpuid                                     \n"
84       : "=b"(info_ebx),
85 #endif  //  defined( __i386__) && defined(__PIC__)
86         "+a"(info_eax), "+c"(info_ecx), "=d"(info_edx));
87   cpu_info[0] = info_eax;
88   cpu_info[1] = info_ebx;
89   cpu_info[2] = info_ecx;
90   cpu_info[3] = info_edx;
91 #endif  // defined(_MSC_VER)
92 }
93 #else  // (defined(_M_IX86) || defined(_M_X64) ...
94 LIBYUV_API
CpuId(int eax,int ecx,int * cpu_info)95 void CpuId(int eax, int ecx, int* cpu_info) {
96   (void)eax;
97   (void)ecx;
98   cpu_info[0] = cpu_info[1] = cpu_info[2] = cpu_info[3] = 0;
99 }
100 #endif
101 
102 // For VS2010 and earlier emit can be used:
103 //   _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0  // For VS2010 and earlier.
104 //  __asm {
105 //    xor        ecx, ecx    // xcr 0
106 //    xgetbv
107 //    mov        xcr0, eax
108 //  }
109 // For VS2013 and earlier 32 bit, the _xgetbv(0) optimizer produces bad code.
110 // https://code.google.com/p/libyuv/issues/detail?id=529
111 #if defined(_M_IX86) && (_MSC_VER < 1900)
112 #pragma optimize("g", off)
113 #endif
114 #if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \
115      defined(__x86_64__)) &&                                     \
116     !defined(__pnacl__) && !defined(__CLR_VER) && !defined(__native_client__)
117 // X86 CPUs have xgetbv to detect OS saves high parts of ymm registers.
GetXCR0()118 int GetXCR0() {
119   int xcr0 = 0;
120 #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
121   xcr0 = (int)_xgetbv(0);  // VS2010 SP1 required.  NOLINT
122 #elif defined(__i386__) || defined(__x86_64__)
123   asm(".byte 0x0f, 0x01, 0xd0" : "=a"(xcr0) : "c"(0) : "%edx");
124 #endif  // defined(__i386__) || defined(__x86_64__)
125   return xcr0;
126 }
127 #else
128 // xgetbv unavailable to query for OSSave support.  Return 0.
129 #define GetXCR0() 0
130 #endif  // defined(_M_IX86) || defined(_M_X64) ..
131 // Return optimization to previous setting.
132 #if defined(_M_IX86) && (_MSC_VER < 1900)
133 #pragma optimize("g", on)
134 #endif
135 
136 // based on libvpx arm_cpudetect.c
137 // For Arm, but public to allow testing on any CPU
ArmCpuCaps(const char * cpuinfo_name)138 LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
139   char cpuinfo_line[512];
140   FILE* f = fopen(cpuinfo_name, "r");
141   if (!f) {
142     // Assume Neon if /proc/cpuinfo is unavailable.
143     // This will occur for Chrome sandbox for Pepper or Render process.
144     return kCpuHasNEON;
145   }
146   while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
147     if (memcmp(cpuinfo_line, "Features", 8) == 0) {
148       char* p = strstr(cpuinfo_line, " neon");
149       if (p && (p[5] == ' ' || p[5] == '\n')) {
150         fclose(f);
151         return kCpuHasNEON;
152       }
153       // aarch64 uses asimd for Neon.
154       p = strstr(cpuinfo_line, " asimd");
155       if (p) {
156         fclose(f);
157         return kCpuHasNEON;
158       }
159     }
160   }
161   fclose(f);
162   return 0;
163 }
164 
165 // TODO(fbarchard): Consider read_msa_ir().
166 // TODO(fbarchard): Add unittest.
MipsCpuCaps(const char * cpuinfo_name,const char ase[])167 LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name,
168                                        const char ase[]) {
169   char cpuinfo_line[512];
170   FILE* f = fopen(cpuinfo_name, "r");
171   if (!f) {
172     // ase enabled if /proc/cpuinfo is unavailable.
173     if (strcmp(ase, " msa") == 0) {
174       return kCpuHasMSA;
175     }
176     return 0;
177   }
178   while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
179     if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) {
180       char* p = strstr(cpuinfo_line, ase);
181       if (p) {
182         fclose(f);
183         if (strcmp(ase, " msa") == 0) {
184           return kCpuHasMSA;
185         }
186         return 0;
187       }
188     }
189   }
190   fclose(f);
191   return 0;
192 }
193 
GetCpuFlags(void)194 static SAFEBUFFERS int GetCpuFlags(void) {
195   int cpu_info = 0;
196 #if !defined(__pnacl__) && !defined(__CLR_VER) &&                   \
197     (defined(__x86_64__) || defined(_M_X64) || defined(__i386__) || \
198      defined(_M_IX86))
199   int cpu_info0[4] = {0, 0, 0, 0};
200   int cpu_info1[4] = {0, 0, 0, 0};
201   int cpu_info7[4] = {0, 0, 0, 0};
202   CpuId(0, 0, cpu_info0);
203   CpuId(1, 0, cpu_info1);
204   if (cpu_info0[0] >= 7) {
205     CpuId(7, 0, cpu_info7);
206   }
207   cpu_info = kCpuHasX86 | ((cpu_info1[3] & 0x04000000) ? kCpuHasSSE2 : 0) |
208              ((cpu_info1[2] & 0x00000200) ? kCpuHasSSSE3 : 0) |
209              ((cpu_info1[2] & 0x00080000) ? kCpuHasSSE41 : 0) |
210              ((cpu_info1[2] & 0x00100000) ? kCpuHasSSE42 : 0) |
211              ((cpu_info7[1] & 0x00000200) ? kCpuHasERMS : 0);
212 
213   // AVX requires OS saves YMM registers.
214   if (((cpu_info1[2] & 0x1c000000) == 0x1c000000) &&  // AVX and OSXSave
215       ((GetXCR0() & 6) == 6)) {  // Test OS saves YMM registers
216     cpu_info |= kCpuHasAVX | ((cpu_info7[1] & 0x00000020) ? kCpuHasAVX2 : 0) |
217                 ((cpu_info1[2] & 0x00001000) ? kCpuHasFMA3 : 0) |
218                 ((cpu_info1[2] & 0x20000000) ? kCpuHasF16C : 0);
219 
220     // Detect AVX512bw
221     if ((GetXCR0() & 0xe0) == 0xe0) {
222       cpu_info |= (cpu_info7[1] & 0x40000000) ? kCpuHasAVX512BW : 0;
223       cpu_info |= (cpu_info7[1] & 0x80000000) ? kCpuHasAVX512VL : 0;
224       cpu_info |= (cpu_info7[2] & 0x00000002) ? kCpuHasAVX512VBMI : 0;
225       cpu_info |= (cpu_info7[2] & 0x00000040) ? kCpuHasAVX512VBMI2 : 0;
226       cpu_info |= (cpu_info7[2] & 0x00001000) ? kCpuHasAVX512VBITALG : 0;
227       cpu_info |= (cpu_info7[2] & 0x00004000) ? kCpuHasAVX512VPOPCNTDQ : 0;
228       cpu_info |= (cpu_info7[2] & 0x00000100) ? kCpuHasGFNI : 0;
229     }
230   }
231 #endif
232 #if defined(__mips__) && defined(__linux__)
233 #if defined(__mips_msa)
234   cpu_info = MipsCpuCaps("/proc/cpuinfo", " msa");
235 #endif
236   cpu_info |= kCpuHasMIPS;
237 #endif
238 #if defined(__arm__) || defined(__aarch64__)
239 // gcc -mfpu=neon defines __ARM_NEON__
240 // __ARM_NEON__ generates code that requires Neon.  NaCL also requires Neon.
241 // For Linux, /proc/cpuinfo can be tested but without that assume Neon.
242 #if defined(__ARM_NEON__) || defined(__native_client__) || !defined(__linux__)
243   cpu_info = kCpuHasNEON;
244 // For aarch64(arm64), /proc/cpuinfo's feature is not complete, e.g. no neon
245 // flag in it.
246 // So for aarch64, neon enabling is hard coded here.
247 #endif
248 #if defined(__aarch64__)
249   cpu_info = kCpuHasNEON;
250 #else
251   // Linux arm parse text file for neon detect.
252   cpu_info = ArmCpuCaps("/proc/cpuinfo");
253 #endif
254   cpu_info |= kCpuHasARM;
255 #endif  // __arm__
256   cpu_info |= kCpuInitialized;
257   return cpu_info;
258 }
259 
260 // Note that use of this function is not thread safe.
261 LIBYUV_API
MaskCpuFlags(int enable_flags)262 int MaskCpuFlags(int enable_flags) {
263   int cpu_info = GetCpuFlags() & enable_flags;
264   SetCpuFlags(cpu_info);
265   return cpu_info;
266 }
267 
268 LIBYUV_API
InitCpuFlags(void)269 int InitCpuFlags(void) {
270   return MaskCpuFlags(-1);
271 }
272 
273 #ifdef __cplusplus
274 }  // extern "C"
275 }  // namespace libyuv
276 #endif
277